For functional failure analysis, use of the scan design for effective testing of sequential circuits is very popular and can be considered the norm for the LSI industry. However in order to take advantage of the features offered by scan designs, it is imperative that the scan chain is operating properly. In this paper; I will introduce a new technique for the efficient diagnosis of the scan chain. The basis for this paper is that if a failure occurs in the scan chain, irregular IDDQ current flow will occur and identify, the defective chain. Moreover; the actual location of the failure inside the chair scan also be ascertained. Then, with result of exemplification, I shall prove the effectiveness of this method.