The resistance of a bridging fault is critical in determining whether the fault can be detected. In order to simulate the effect of a bridging fault it is necessary to determine the intermediate voltage of the shorted nodes and compared it to the logic threshold voltage of the driven gates. We present an algorithm, which can be used to overcome the Byzantine General's problem during the fault simulation and test pattern generation. The algorithm applies to very low bridging fault resistance, and modifies to apply for different values of BF resistance. This algorithm applies to external and internal of inter-gate bridging fault. Moreover, the algorithm is extremely faster than the previous ones since no spice simulation is required. The accuracy is of 0.01 V to compare with SPICE simulation in the interval of intermediate.