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Seventh Asian Test Symposium (ATS'98)
Fault Characterization of Low Capacitance Full-Swing BiCMOS Logic Circuits
Singapore
December 02-December 04
ISBN: 0-8186-8277-9
S.M. Aziz, Bangladesh University of Engineering &Technology
J. Kamruzzaman, Bangladesh University of Engineering &Technology
Analysis of testability of a class of low capacitance full-swing BiCMOS logic circuits is presented in this paper. It is shown that the stuck-open faults in the bipolar drivers of these circuits are masked by the additional MOS devices used to obtain full output logic swing. However, the stuck-open faults in the MOS devices are detectable by two-pattern tests as in standard CMOS. All single stuck-on faults result in significant increment in IDDQ when sensitized. Therefore, like static CMOS, these faults can be detected by IDDQ testing.
Citation:
S.M. Aziz, J. Kamruzzaman, "Fault Characterization of Low Capacitance Full-Swing BiCMOS Logic Circuits," ats, pp.119, Seventh Asian Test Symposium (ATS'98), 1998
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