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Sixth Asian Test Symposium (ATS'97)
Analog signal metrology for mixed signal ICs
Akita, JAPAN
November 17-November 18
ISBN: 0-8186-8209-4
Chauchin Su, Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
Yi-Ren Cheng, Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
Yue-Tsang Chen, Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
Shing Tenchen, Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
Signal reconstruction reconstructs a multiple period low-rate sampled waveform into a one-period high-rate sampled waveform. With which, we are able to provide sufficient samples of analog signals for DSP based testing using on-chip ADCs. Test results show that a 128-sample-per-period waveform can be reconstructed from a 2.4 samples per period waveform sampled by a 20 MHz 8-bit ADC.
Index Terms:
mixed analogue-digital integrated circuits; Analog signal metrology; mixed signal IC; Signal reconstruction; multiple period low-rate sampled waveform; high-rate sampled waveform; DSP based testing; on-chip ADC; 20 MHz
Citation:
Chauchin Su, Yi-Ren Cheng, Yue-Tsang Chen, Shing Tenchen, "Analog signal metrology for mixed signal ICs," ats, pp.194, Sixth Asian Test Symposium (ATS'97), 1997
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