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Sixth Asian Test Symposium (ATS'97)
An Algorithmic Test Generation Method for Crosstalk Faults in Synchronous Sequential Circuits
Akita, JAPAN
November 17-November 18
ISBN: 0-8186-8209-4
Noroyoshi Itazaki, Applied Physics, Osaka Univ.
Yasutaka Idomoto, Applied Physics, Osaka Univ.
Kozo Kinoshita, Applied Physics, Osaka Univ.
As VLSI circuits become high-speed and high-density, a crosstalk fault becomes an important problem. In a synchronous sequential circuit, since the crosstalk fault between a data line and a clock line is important, we described an algorithmic test generation technique for the fault. Some simulation results of our method for the ISCAS bench mark circuits are reported.
Index Terms:
Crosstalk fault, test generation, synchronous sequential circuit
Citation:
Noroyoshi Itazaki, Yasutaka Idomoto, Kozo Kinoshita, "An Algorithmic Test Generation Method for Crosstalk Faults in Synchronous Sequential Circuits," ats, pp.22, Sixth Asian Test Symposium (ATS'97), 1997
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