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Fifth Asian Test Symposium (ATS'96)
AND/EXOR based Synthesis of Testable KFDD-Circuits with Small Depth
Hsinchu, TAIWAN
November 20-November 22
ISBN: 0-8186-7478-4
Harry Hengster, Albert-Ludwigs-University
Rolf Drechsler, Albert-Ludwigs-University
Bernd Becker, Albert-Ludwigs-University
Stefan Eckrich, Johann Wolfgang Goethe-University
Tonja Pfeiffer, Johann Wolfgang Goethe-University
Decision Diagrams are used in design automation for efficient representation of Boolean functions. It is also possible to directly derive circuits from Decision Diagrams. In this paper we present an approach to synthesize circuits from a very general class of Decision Diagrams, the ordered Kronecker Functional Decision Diagrams. These Decision Diagrams make use of Davio decompositions which are based on exclusive-or operations and therefore allow the use of EXOR gates in the synthesized circuits. We investigate area, depth, and testability of these circuits and compare them to circuit designs generated by other synthesis tools. Experimental results show that the presented approach is suitable to overcome the trade-off between depth and testability at the price of reasonable area overhead.
Index Terms:
synthesis for testability, EXOR based synthesis, delay optimization
Citation:
Harry Hengster, Rolf Drechsler, Bernd Becker, Stefan Eckrich, Tonja Pfeiffer, "AND/EXOR based Synthesis of Testable KFDD-Circuits with Small Depth," ats, pp.148, Fifth Asian Test Symposium (ATS'96), 1996
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