Fifth Asian Test Symposium (ATS'96)
Testing And Diagnosis Of Board Interconnects In Microprocessor-Based Systems
Hsinchu, TAIWAN
November 20-November 22
ISBN: 0-8186-7478-4
In this paper we propose a low-cost board-level testing method for printed circuit boards in microprocessor-based systems. The fault detection is achieved by replacing the CPU with a bus emulator to test faults on wiring interconnects. Test patterns are sent by the bus emulator and the results are collected by it later for analysis. We also discuss how to derive minimum test sets for the diagnosis of all modeled faults. Multiple-board systems can be tested by hierarchically applying our method. With this approach, board testing is conducted in a way similar to functional testing while at the same time reach the controllability and observability offered by in-circuit testing.
Index Terms:
printed circuit testing; testing; diagnosis; hierarchical testing; microprocessor; multiple-board system; printed circuit board; bus emulator; fault detection; wiring interconnect
Citation:
Po-Ching Hsu, Sying-Jyan Wang, "Testing And Diagnosis Of Board Interconnects In Microprocessor-Based Systems," ats, pp.56, Fifth Asian Test Symposium (ATS'96), 1996