Fourth Asian Test Symposium (ATS'95)
Enhancing multiple fault diagnosis in combinational circuits based on sensitized paths and EB testing
Bangalore, India
November 23-November 24
ISBN: 0-8186-7129-7
H. Takahashi, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
N. Yanagida, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
Y. Takamatsu, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
In this paper, we improve the previous method by enhancing a set of diagnostic tests and using an EB testing method. We first enhance the previous set of diagnostic tests to one of diagnostic tests consisting of the four sets, TP-1, TP-2, TP-3 and TP-4. We next present two diagnostic methods by using the enhanced diagnostic tests and an electron-beam tester (EB-tester). Experimental results show that the presented method identified fault locations within 0.2 to 5% of all stuck-at faults on all lines in the circuit by probing about 0.8 to 15% internal lines.
Index Terms:
combinational circuits; fault diagnosis; logic testing; fault location; electron beam testing; VLSI; multiple fault diagnosis; combinational circuits; sensitized paths; EB testing; TP-1; TP-2; TP-3; TP-4; electron-beam tester; fault location; stuck-at faults; internal lines; diagnostic resolution
Citation:
H. Takahashi, N. Yanagida, Y. Takamatsu, "Enhancing multiple fault diagnosis in combinational circuits based on sensitized paths and EB testing," ats, pp.58, Fourth Asian Test Symposium (ATS'95), 1995