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10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'04)
Transistor Sizing: How to Control the Speed and Energy Consumption of a Circuit
Crete, Greece
April 19-April 23
ISBN: 0-7695-2133-9
Jo Ebergen, Sun Microsystems Laboratories
Jonathan Gainsley, Sun Microsystems Laboratories
Paul Cunningham, Sun Microsystems Laboratories
We introduce a simple model for calculating transistor sizes of an asynchronous control circuit. The model builds on the theory of Logical Effort and relates transistor sizes to the speed and energy consumption of a circuit. We show how to calculate transistor sizes quickly, how to calculate the speed limit of a circuit, and how to compare circuits in terms of energy-versus-speed independent of a process technology. We compare three asynchronous control circuits for a FIFO: a chain of C-elements, an asP* control, and a GasP control.
Citation:
Jo Ebergen, Jonathan Gainsley, Paul Cunningham, "Transistor Sizing: How to Control the Speed and Energy Consumption of a Circuit," async, pp.51-61, 10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'04), 2004
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