Ninth IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'03)
Timing Measurements of Synchronization Circuits
Vancouver, B.C., Canada
May 12-May 15
ISBN: 0-7695-1898-2
A regular (two-flop) synchronizer and six multi-synchronous synchronizers are implemented on a programmable logic device and are measured. An experiment system and method for measuring synchronizers and metastable flip-flops are described. Two separate settling time constants are shown for a metastable flop, confirming earlier results of Dike and Burton [1]. Clocking cross-talk between asynchronous clocks is demonstrated. The regular synchronizer is useful for communications between asynchronous clock domains, while the other synchronizers can provide higher bandwidth communications between multi-synchronous and mesochronous domains.