Adding Synchronous and LSSD Modes to Asynchronous Circuits

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Eighth International Symposium on Asynchronus Circuits and Systems (ASYNC'02)

Manchester, United Kingdom

April 08-April 11

ISBN: 0-7695-1540-1

	ASCII Text	x
	Ad Peeters, Frank de Beest, Kees van Berkel, "Adding Synchronous and LSSD Modes to Asynchronous Circuits," Asynchronous Circuits and Systems, International Symposium on, pp. 161, Eighth International Symposium on Asynchronus Circuits and Systems (ASYNC'02), 2002.

	BibTex	x
	@article{ 10.1109/ASYNC.2002.1000306, author = {Ad Peeters and Frank de Beest and Kees van Berkel}, title = {Adding Synchronous and LSSD Modes to Asynchronous Circuits}, journal ={Asynchronous Circuits and Systems, International Symposium on}, volume = {0}, year = {2002}, issn = {1522-8681}, pages = {161}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASYNC.2002.1000306}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asynchronous Circuits and Systems, International Symposium on TI - Adding Synchronous and LSSD Modes to Asynchronous Circuits SN - 1522-8681 SP EP A1 - Ad Peeters, A1 - Frank de Beest, A1 - Kees van Berkel, PY - 2002 KW - asynchronous circuits KW - design for testability KW - scan test KW - LSSD VL - 0 JA - Asynchronous Circuits and Systems, International Symposium on ER -

Ad Peeters, Philips Research Laboratories

Frank de Beest, University of Twente

Kees van Berkel, Philips Research Laboratories and Eindhoven University of Technology

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASYNC.2002.1000306

A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rules. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.

Index Terms:

asynchronous circuits, design for testability, scan test, LSSD

Citation:

Ad Peeters, Frank de Beest, Kees van Berkel, "Adding Synchronous and LSSD Modes to Asynchronous Circuits," async, pp.161, Eighth International Symposium on Asynchronus Circuits and Systems (ASYNC'02), 2002

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