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Eighth International Symposium on Asynchronus Circuits and Systems (ASYNC'02)
Point to Point GALS Interconnect
Manchester, United Kingdom
April 08-April 11
ISBN: 0-7695-1540-1
Robert Mullins, University of Cambridge
Peter Robinson, University of Cambridge
Simon Moore, University of Cambridge
George Taylor, University of Cambridge

Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of lock pausing techniques, self-calibrating delay lines and an asynchronous interconnect. Such a scheme can be used for point-to-point communication in a globally asynchronous locally synchronous (GALS) system, a possible methodology for managing the predicted increase in clock domains.

We present interface wrapper circuits which permit communication between a locally synchronous producer and a locally synchronous consumer via an asynchronous interconnect. Such interfaces can also be used to mix asynchronous and synchronous modules. Clock pausing is used to guarantee that metastability will never result in failure. Arbitration between channel communication and the local clock is performed concurrently so that metastability resolution will rarely delay the clock. Simulation results show that the maximum performance of one data item per consumer clock cycle is achieved when the producer:consumer clock ratio is equal or greater to one. This communication mechanism is suited to other asynchronous interconnect methods which offer low power and high performance.

Citation:
Robert Mullins, Peter Robinson, Simon Moore, George Taylor, "Point to Point GALS Interconnect," async, pp.69, Eighth International Symposium on Asynchronus Circuits and Systems (ASYNC'02), 2002
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