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Fifth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC'99)
Reconfigurable Latch Controllers for Low Power Asynchronous Circuits
Barcelona, Spain
April 19-April 21
ISBN: 0-7695-0031-5
M. Lewis, University of Manchester
J. Garside, University of Manchester
L. Brackenbury, University of Manchester
A method for reducing the power consumption in asynchronous micropipeline-based circuits is presented. The method is based around a new design for latch controllers in which the operating mode of the pipeline latches (normally open/transparent or normally closed/opaque) can be selected according to the dynamic processing demand on the circuit. Operating in normally-closed mode prevents spurious transitions from propagating along a static pipeline, at the expense of reduced throughput. Tests of the new latch controller circuits on a pipelined multiplier datapath show that reductions in energy per operation of up to 32% can be obtained by changing to the normally-closed operating mode. Estimates suggest that in a typical application which exhibits a variable processing demand, a power reduction of between 16- 24% is possible, with little or no impact on maximum throughput.
Citation:
M. Lewis, J. Garside, L. Brackenbury, "Reconfigurable Latch Controllers for Low Power Asynchronous Circuits," async, pp.27, Fifth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC'99), 1999
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