Third International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97) Bundled Data Asynchronous Multipliers with Data Dependent Computation Times Eindhoven, THE NETHERLANDS April 07-April 10 ISBN: 0-8186-7922-0
A novel asynchronous design method is introduced which combines the area efficiency of bundled data with data dependent computation time. The design of a 16x16 bit multiplier using this technique is explained and evaluated. Simulation results show that area time savings of 20% compared to an equivalent synchronous design can be achieved.
Index Terms:
asynchronous logic data dependent performance multiplier
Citation:
David Kearney, Neil W. Bergmann, "Bundled Data Asynchronous Multipliers with Data Dependent Computation Times," async, pp.186, Third International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 1997 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||