A fully asynchronous Reed-Solomon decoder for the DCC player has been designed in the VLSI programming language Tangram. The main design aim was minimal power dissipation. The design decisions leading to a low-power cost-effective design are discussed. The asynchronous circuit has been fabricated and successfully incorporated in a working DCC system. We estimate that this chip is less than 20% larger in area and at a supply voltage of 5 V five times more economic in power consumption than existing clocked implementations. The chip has two power pins: one for a low and one for a high voltage. Depending on the work-load the circuit dynamically selects one of the two supply voltages by means of a power switch. If the chip is operated at 1.5 V and 5 V, the power dissipation is further reduced by a factor 20.