loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99)
Watermarking Layout Topologies
Wanchai, Hong Kong
January 18-January 21
ISBN: 0-7803-5012-X
Edoardo Charbon, Cadence Design Systems Inc., San Jose, California
Ilhami Torunoglu, Cadence Design Systems Inc., San Jose, California
Watermarking is a technique currently being developed to effectively protect Intellectual Properties of various types. In this paper a formalization of the watermarking problem is presented in the context of IC physical design. A class of algorithms is proposed for implanting arbitrary codes in the inherent structure of layout topologies. Similarly, a method is given to reconstruct the original watermark for a given design. The concepts of robustness against forgery and theft tracking are analyzed in light of the proposed algorithms. Examples show the suitability of the approach.
Citation:
Edoardo Charbon, Ilhami Torunoglu, "Watermarking Layout Topologies," asp-dac, pp.213, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999
Usage of this product signifies your acceptance of the Terms of Use.