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Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99)
A Scalable Pipelined Architecture for Separable 2-D Discrete Wavelet Transform
Wanchai, Hong Kong
January 18-January 21
ISBN: 0-7803-5012-X
Jer Min Jou, National Cheng Kung University, Taiwan
Pei-Yin Chen, National Cheng Kung University, Taiwan
Yeu-Horng Shiau, National Cheng Kung University, Taiwan
Ming-Shiang Liang, National Cheng Kung University, Taiwan
This paper presents a highly scalable efficient architecture for separable 2-D Discrete Wavelet Transform (DWT) which is simple, regular, modular and pipelined for the computation of 2-D DWT. With these properties, it is easily scalable for different filter lengths and different octabe levels. In addition, the architecture has the characteristics of lower hardware cost, shorter latency, and higher throughput rate.
Citation:
Jer Min Jou, Pei-Yin Chen, Yeu-Horng Shiau, Ming-Shiang Liang, "A Scalable Pipelined Architecture for Separable 2-D Discrete Wavelet Transform," asp-dac, pp.205, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999
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