Hazard-Free Synthesis and Decomposition of Asynchronous Circuits

A
ASP-DAC
1999
Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99)
Abstract - Hazard-Free Synthesis and Decomposition of Asynchronous Circuits

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Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99)

Wanchai, Hong Kong

January 18-January 21

ISBN: 0-7803-5012-X

	ASCII Text	x
	Ren-Der Chen, Jer Min Jou, Yeu-Horng Shiau, "Hazard-Free Synthesis and Decomposition of Asynchronous Circuits," Asia and South Pacific Design Automation Conference, pp. 185, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999.

	BibTex	x
	@article{ 10.1109/ASPDAC.1999.759991, author = {Ren-Der Chen and Jer Min Jou and Yeu-Horng Shiau}, title = {Hazard-Free Synthesis and Decomposition of Asynchronous Circuits}, journal ={Asia and South Pacific Design Automation Conference}, volume = {0}, year = {1999}, isbn = {0-7803-5012-X}, pages = {185}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.1999.759991}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asia and South Pacific Design Automation Conference TI - Hazard-Free Synthesis and Decomposition of Asynchronous Circuits SN - 0-7803-5012-X SP EP A1 - Ren-Der Chen, A1 - Jer Min Jou, A1 - Yeu-Horng Shiau, PY - 1999 KW - null VL - 0 JA - Asia and South Pacific Design Automation Conference ER -

Ren-Der Chen, National Cheng Kung University, Tainan, Taiwan

Jer Min Jou, National Cheng Kung University, Tainan, Taiwan

Yeu-Horng Shiau, National Cheng Kung University, Tainan, Taiwan

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASPDAC.1999.759991

In this paper, we solve the problems of hazard-free synthesis and decomposition of asynchronous speed-independent circuits for technology mapping. All high fanin gates are decomposed into gates that can be implemented by the gate library. We first analyze the conditions where hazards may occur during decomposition and then give corresponding strategies to solve them. All the proposed algorithms have been implemented and applied to the asynchronous benchmarks to verigy their correctness. Experimental results show that less area is required in our final implementations.

Citation:

Ren-Der Chen, Jer Min Jou, Yeu-Horng Shiau, "Hazard-Free Synthesis and Decomposition of Asynchronous Circuits," asp-dac, pp.185, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999

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