Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis

A
ASP-DAC
1999
Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99)
Abstract - Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis

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Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99)

Wanchai, Hong Kong

January 18-January 21

ISBN: 0-7803-5012-X

	ASCII Text	x
	Nagu R. Dhanwada, Adrian Nunez-Aldana, Ranga Vemuri, "Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis," Asia and South Pacific Design Automation Conference, pp. 153, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999.

	BibTex	x
	@article{ 10.1109/ASPDAC.1999.759983, author = {Nagu R. Dhanwada and Adrian Nunez-Aldana and Ranga Vemuri}, title = {Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis}, journal ={Asia and South Pacific Design Automation Conference}, volume = {0}, year = {1999}, isbn = {0-7803-5012-X}, pages = {153}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.1999.759983}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asia and South Pacific Design Automation Conference TI - Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis SN - 0-7803-5012-X SP EP A1 - Nagu R. Dhanwada, A1 - Adrian Nunez-Aldana, A1 - Ranga Vemuri, PY - 1999 KW - null VL - 0 JA - Asia and South Pacific Design Automation Conference ER -

Nagu R. Dhanwada, University of Cincinnati, OH

Adrian Nunez-Aldana, University of Cincinnati, OH

Ranga Vemuri, University of Cincinnati, OH

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASPDAC.1999.759983

In this paper, we present a constraint transformation and topology selection methodology that explores the system level parameter space to compute acceptable regions in the component parameter space. The search process of an underlying circuit synthesis tool could be confined to these regions of valid solutions. Experimental results showing the impact of parameter space exploration at a higher level on analog circuit synthesis are presented, demonstrating the effectiveness of this technique.

Citation:

Nagu R. Dhanwada, Adrian Nunez-Aldana, Ranga Vemuri, "Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis," asp-dac, pp.153, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999

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