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Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99)
VCO Jitter Simulation and Its Comparison With Measurement
Wanchai, Hong Kong
January 18-January 21
ISBN: 0-7803-5012-X
Masayuki Takahashi, Sony Corporation Semiconductor Company, Japan
Kimihiro Ogawa, Sony Corporation Semiconductor Company, Japan
Kenneth S. Kundert, Cadence Design Systems, San Jose, CA
We have simulated the phase noise of a voltage controlled oscillator (VCO) using an RF circuit simulator, SpectreRF{TM}. This simulator uses a variation of the periodic noise analysis first proposed by Okumura, et al [2]. It computes the power spectral density of the noise as a function of frequency. By assuming that only white noise sources are present in the oscillator it is possibe to derive a simple relationship between the level of the phase noise and the jitter. This excludes flicker noise from consideration, however since flicker noise is a low-frequency phenomenon, excluding it only affects the accuracy of the long-term jitter. We compared the jitter with measurement and found the error to be less than 2 dB. An AHDL model for the VCO that efficiently exhibits jitter in the time domain is included. The model was written in Verilog-A. This model can be used to determine the affect of VCO jitter on a larger system, such as a phase-locked loop (PLL).
Citation:
Masayuki Takahashi, Kimihiro Ogawa, Kenneth S. Kundert, "VCO Jitter Simulation and Its Comparison With Measurement," asp-dac, pp.85, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999
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