Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99)
Motion Estimator LSI for MPEG2 High Level Standard
Wanchai, Hong Kong
January 18-January 21
ISBN: 0-7803-5012-X
Li Jiang, Tokyo Institute of Technology, Tokyo
Dongju Li, Tokyo Institute of Technology, Tokyo
In this design, a dedicated motion estimation LSI of MPEG2 is presented. Combining our bits truncation adaptive pyramid (BTAP) algorithm with Window-MSPA architecture as well as by using custom cell and full custom design methods, the chip size becomes 4.8mm x 4.8mm small with 0.5u 2-level metal CMOS technology. The test chip which works at 41.5 MHz, possesses a search ranges of μ67 for image size of 1920 x 1152 and achieves video rate of 30 field/s.
Citation:
Li Jiang, Dongju Li, Shintaro Haba, Chawalit Honsawek, Hiroaki Kunieda, "Motion Estimator LSI for MPEG2 High Level Standard," asp-dac, pp.41, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999