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15th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'04) Galveston, Texas September 27-September 29 ISBN: 0-7695-2226-2 Table of Contents
Philip J. Kuekes, Hewlett-Packard Laboratories pp. 2-3
Modeling and Scheduling Parallel Data Flow Systems using Structured Systems of Recurrence Equations (Abstract)
Fran?ois Charot, Irisa, Campus de Beaulieu, France
Madeleine Nyamsi, Irisa, Campus de Beaulieu, France
Patrice Quinton, Irisa, Campus de Beaulieu, France
Charles Wagner, Irisa, Campus de Beaulieu, France pp. 6-16
Frank Hannig, University of Erlangen-Nuremberg, Germany
J? Teich, University of Erlangen-Nuremberg, Germany pp. 17-27
Vida Kianzad, University of Maryland, College Park
Shuvra S. Bhattacharyya, University of Maryland, College Park pp. 28-40
Y. Xie, Pennsylvania State University
L. Li, Pennsylvania State University
M. Kandemir, Pennsylvania State University
N. Vijaykrishnan, Pennsylvania State University
M. J. Irwin, Pennsylvania State University pp. 41-50
Complex Square Root with Operand Prescaling (Abstract)
Milos D. Ercegovac, University of California at Los Angeles
Jean-Michel Muller, Ecole Normale Sup?rieure de Lyon, France pp. 52-62
Parallel Montgomery Multipliers (Abstract)
Moboluwaji O. Sanu, The University of Texas at Austin
Earl E. Swartzlander, Jr., The University of Texas at Austin
Craig M. Chase, The University of Texas at Austin pp. 63-72
Alexandre F. Tenca, Oregon State University
Ajay C. Shantilal, Oregon State University
Mohammed H. Sinky, Oregon State University pp. 73-83
Liang-Kai Wang, University of Wisconsin-Madison
Michael J. Schulte, University of Wisconsin-Madison pp. 84-95
Hans Eberle, Sun Microsystems Laboratories
Nils Gura, Sun Microsystems Laboratories
Sheueling Chang Shantz, Sun Microsystems Laboratories
Vipul Gupta, Sun Microsystems Laboratories
Leonard Rarick, Sun Microsystems Laboratories
Shreyas Sundaram, University of Waterloo pp. 98-110
Johann Gro?sch?dl, IAIK, Graz University of Technology, Austria
Sandeep S. Kumar, Ruhr University Bochum, Germany
Christof Paar, Ruhr University Bochum, Germany pp. 111-124
A. Murat Fiskiran, Princeton University
Ruby B. Lee, Princeton University pp. 125-136
Efficient Processing of Color Image Sequences Using a Color-Aware Instruction Set on Mobile Systems (Abstract)
Jongmyon Kim, Georgia Institute of Technology, Atlanta
D. Scott Wills, Georgia Institute of Technology, Atlanta pp. 137-149
Casper Lageweg, Delft University of Technology, The Netherlands
Sorin Cotofana, Delft University of Technology, The Netherlands
Stamatis Vassiliadis, Delft University of Technology, The Netherlands pp. 152-166
Valeriu Beiu, Washington State University, Pullman, WA pp. 167-177
Rama Sangireddy, University of Texas at Dallas, Richardson, TX pp. 180-190
Design and Evaluation of a Network-Based Asynchronous Architecture for Cryptographic Devices (Abstract)
Ljiljana Dilparic, University of Edinburgh, UK
D. K. Arvind, University of Edinburgh, UK pp. 191-201
Anup Hosangadi, University of California, Santa Barbara
Farzan Fallah, Fujitsu Labs of America, Inc.
Ryan Kastner, University of California, Santa Barbara pp. 202-212
J. I. Gomez, DACYA UCM
P. Marchal, IMEC/ESAT KULeuven
S. Verdoorlaege, ESAT KULeuven
L. Pinuel, DACYA UCM
F. Catthoor, IMEC/ESAT KULeuven pp. 213-223
Switching-Activity Minimization on Instruction-Level Loop Scheduling for VLIWDSP Applications (Abstract)
Zili Shao, University of Texas at Dallas
Qingfeng Zhuge, University of Texas at Dallas
Meilin Liu, University of Texas at Dallas
Bin Xiao, University of Texas at Dallas
Edwin H.-M. Sha, University of Texas at Dallas pp. 224-234
Alex Fit-Florea, Southern Methodist University
David W. Matula, Southern Methodist University pp. 236-246
Lo'ai A. Tawalbeh, Oregon State University, USA
Alexandre F. Tenca, Oregon State University, USA pp. 247-257
L. Breveglieri, Politecnico di Milano, Italy
I. Koren, University of Massachusetts, Amherst
Paolo Maistri, Politecnico di Milano, Italy pp. 258-268
Michael J. Schulte, Sandbridge Technologies, Inc., White Plains, NY; University of Wisconsin, Madison, WI
Kai Chirca, Sandbridge Technologies, Inc., White Plains, NY
John Glossner, Sandbridge Technologies, Inc., White Plains, NY
Haoran Wang, Sandbridge Technologies, Inc., White Plains, NY
Suman Mamidi, Sandbridge Technologies, Inc., White Plains, NY; University of Wisconsin, Madison, WI
Pablo Balzola, Sandbridge Technologies, Inc., White Plains, NY
Stamatis Vassiliadis, Delft University of Technology, The Netherlands pp. 269-279
A Hierarchical Classification Scheme to Derive Interprocess Communication in Process Networks (Abstract)
Alexandru Turjan, Leiden Institute of Advanced Computer Science (LIACS), The Netherlands
Bart Kienhuis, Leiden Institute of Advanced Computer Science (LIACS), The Netherlands
Ed Deprettere, Leiden Institute of Advanced Computer Science (LIACS), The Netherlands pp. 282-292
Antoine Fraboulet, Citi, Insa-Lyon, France
Tanguy Risset, Inria, Lip, ENS-Lyon, France pp. 293-303
Automatic Synthesis of Customized Local Memories for Multicluster Application Accelerators (Abstract)
Manjunath Kudlur, University of Michigan, Ann Arbor
Kevin Fan, University of Michigan, Ann Arbor
Michael Chu, University of Michigan, Ann Arbor
Scott Mahlke, University of Michigan, Ann Arbor pp. 304-314
Optimized Data-Reuse in Processor Arrays (Abstract)
Sebastian Siegel, Dresden University of Technology, Germany
Renate Merker, Dresden University of Technology, Germany pp. 315-325
Gordon Brebner, Xilinx Research Laboratories
Phil James-Roxby, Xilinx Research Laboratories
Eric Keller, Xilinx Research Laboratories
Chidamber Kulkarni, Xilinx Research Laboratories pp. 328-338
Miljan Vuletic, Swiss Federal Institute of Technology Lausanne, Switzerland
Laura Pozzi, Swiss Federal Institute of Technology Lausanne, Switzerland
Paolo Ienne, Swiss Federal Institute of Technology Lausanne, Switzerland pp. 339-351
Tom Van Court, Boston University
Martin C. Herbordt, Boston University pp. 354-364
Praveen Krishnamurthy, Washington University in St. Louis
Jeremy Buhler, Washington University in St. Louis
Roger Chamberlain, Washington University in St. Louis
Mark Franklin, Washington University in St. Louis
Kwame Gyang, Washington University in St. Louis
Joseph Lancaster, Washington University in St. Louis pp. 365-375
Tuomas J?rvinen, Tampere University of Technology, Finland
Perttu Salmela, Tampere University of Technology, Finland
Harri Sorokin, Tampere University of Technology, Finland
Jarmo Takala, Tampere University of Technology, Finland pp. 376-386
Fabien Castanier, ST Microelectronics
Alberto Ferrante, University of Milan
Vincenzo Piuri, University of Milan pp. 387-397
Oliver Amft, ETH Z?rich, Switzerland
Michael Lauffer, ETH Z?rich, Switzerland
Stijn Ossevoort, ETH Z?rich, Switzerland
Fabrizio Macaluso, ETH Z?rich, Switzerland
Paul Lukowicz, ETH Z?rich, Switzerland
Gerhard Tr?ster, ETH Z?rich, Switzerland pp. 398-410 Usage of this product signifies your acceptance of the Terms of Use.
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