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1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'97)
Zurich, SWITZERLAND
July 14-July 16
ISBN: 0-8186-7958-1
Table of Contents
Keynote
M. Zeller, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
J.C. Phillips, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
A. Dalke, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
W. Humphrey, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
K. Schulten, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
T.S. Huang, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
V.I. Pavlovic, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
Y. Zhao, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
Z. Lo, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
S. Chu, Beckman Institute for Advanced Science and Technology University of Illinois at Urbana-Champaign
R. Sharma, Pennsylvania State University
pp. 3
Regular Architectures
H. Kwan, Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
E.J. Powers, Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
E.E. Swartzlander, Jr., Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
pp. 24
E. Rijpkema, Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
G. Hekstra, Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
E.F. Deprettere, Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
Jun Ma, Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
pp. 53
Special Session: Architectures for Video Coding, Organizers: L. Chen, P. Pirsch
Yuan-Hau Yeh, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Chen-Yi Lee, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
pp. 76
Yeong-Kang Lai, Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Liang-Gee Chen, Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Yung-Pin Lee, Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
pp. 96
Arithmetic
R.R. Osorio, Dept. of Electron. & Comput., Santiago de Compostela Univ., Spain
J.D. Bruguera, Dept. of Electron. & Comput., Santiago de Compostela Univ., Spain
pp. 106
A. Drolshagen, Institute for Microelectronics, FB1, University of Bremen,
H. Henkelmann, Institute for Microelectronics, FB1, University of Bremen,
W. Anheier, Institute for Microelectronics, FB1, University of Bremen,
pp. 116
J. Villalba, Dept. Comput. Archit., Malaga Univ., Spain
T. Lang, Dept. Comput. Archit., Malaga Univ., Spain
pp. 124
Tomas Lang, University of California at Irvine
Elisardo Antelo, Universidade de Santiago de Compostela
pp. 132
Christian V. Schimpfle, Munich University of Technology
Sven Simon, Munich University of Technology
Josef A. Nossek, Munich University of Technology
pp. 154
P. Pirsch, Lab. fur Informationstechnol., Hannover Univ., Germany
H.-J. Stolberg, Lab. fur Informationstechnol., Hannover Univ., Germany
pp. 176
Array Synthesis
R. Andonov, LIMAV, Valenciennes Univ., France
N. Yanev, LIMAV, Valenciennes Univ., France
H. Bourzoufi, LIMAV, Valenciennes Univ., France
pp. 209
Special Session: Mapping Models of Computation to Architectures, Organizers: E. Deprettere, B. Evans, K. Vissers
S.S. Bhattacharyya, Hitachi America Ltd., Brisbane, CA, USA
P.K. Murthy, Hitachi America Ltd., Brisbane, CA, USA
E.A. Lee, Hitachi America Ltd., Brisbane, CA, USA
pp. 250
H.P. Peixoto, Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
M.F. Jacome, Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
pp. 272
J. Horstmannshoff, Integrated Syst. for Signal Process., Aachen Univ. of Technol., Germany
T. Grotker, Integrated Syst. for Signal Process., Aachen Univ. of Technol., Germany
H. Meyr, Integrated Syst. for Signal Process., Aachen Univ. of Technol., Germany
pp. 283
Design Methodology I
T. Disz, Div. of Math. & Comput. Sci., Argonne Nat. Lab., IL, USA
R. Olson, Div. of Math. & Comput. Sci., Argonne Nat. Lab., IL, USA
R. Stevens, Div. of Math. & Comput. Sci., Argonne Nat. Lab., IL, USA
pp. 316
C. Ancourt, Ecole de Mines de Paris, Fontainebleau, France
D. Barthou, Ecole de Mines de Paris, Fontainebleau, France
C. Guettier, Ecole de Mines de Paris, Fontainebleau, France
F. Irigoin, Ecole de Mines de Paris, Fontainebleau, France
B. Jeannet, Ecole de Mines de Paris, Fontainebleau, France
J. Jourdan, Ecole de Mines de Paris, Fontainebleau, France
J. Mattioli, Ecole de Mines de Paris, Fontainebleau, France
pp. 350
C. Ebeling, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
D.C. Cronquist, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
P. Franklin, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
pp. 0364
Systems and Applications
Luca Breveglieri, Dipartimento di Elettronica e Informazione - Politecnico di Milan0
Luigi Dadda, Dipartimento di Elettronica e Informazione - Politecnico di Milan0
Vincenzo Piuri, Dipartimento di Elettronica e Informazione - Politecnico di Milan0
pp. 374
Reiner W. Hartenstein, University of Kaiserslautern
Jürgen Becker, University of Kaiserslautern
Michael Herz, University of Kaiserslautern
Ulrich Nageldinger, University of Kaiserslautern
pp. 392
S. Dogimont, Ecole Polytech. Federale de Lausanne, Switzerland
M. Gumm, Ecole Polytech. Federale de Lausanne, Switzerland
F. Mombers, Ecole Polytech. Federale de Lausanne, Switzerland
D. Mlynek, Ecole Polytech. Federale de Lausanne, Switzerland
A. Torielli, Ecole Polytech. Federale de Lausanne, Switzerland
pp. 412
A. Negoi, Lab. de Phys. des Composants a Semicond., ENSERG, Grenoble, France
A. Guyot, Lab. de Phys. des Composants a Semicond., ENSERG, Grenoble, France
J. Zimmermann, Lab. de Phys. des Composants a Semicond., ENSERG, Grenoble, France
pp. 422
Special Session: Design Methodology II, Organizer: G. Fettweis
S. Pees, Integrated Syst. for Signal Process., Aachen Univ. of Technol., Germany
M. Vaupel, Integrated Syst. for Signal Process., Aachen Univ. of Technol., Germany
V. Zivojnovic, Integrated Syst. for Signal Process., Aachen Univ. of Technol., Germany
H. Meyr, Integrated Syst. for Signal Process., Aachen Univ. of Technol., Germany
pp. 448
H. Dawid, Synopsys Inc., Herzogenrath, Germany
K.-J. Koch, Synopsys Inc., Herzogenrath, Germany
J. Stahl, Synopsys Inc., Herzogenrath, Germany
pp. 458
Image Processing and Filtering
P.M. Kuhn, Tech. Univ. Munchen, Germany
A. Weisgerber, Tech. Univ. Munchen, Germany
R. Poppenwimmer, Tech. Univ. Munchen, Germany
W. Stechele, Tech. Univ. Munchen, Germany
pp. 479
M. Sanchez, Dept. of Comput. Archit., Malaga Univ., Spain
J. Lopez, Dept. of Comput. Archit., Malaga Univ., Spain
O. Plata, Dept. of Comput. Archit., Malaga Univ., Spain
E.L. Zapata, Dept. of Comput. Archit., Malaga Univ., Spain
pp. 499
Jui-Hua Li, Dept. of Comput. Eng., Santa Clara Univ., CA, USA
Nam Ling, Dept. of Comput. Eng., Santa Clara Univ., CA, USA
pp. 509
Benjamin W. Wah, University of Illinois at Urbana-Champaign
Yi Shang, University of Illinois at Urbana-Champaign
Zhe Wu, University of Illinois at Urbana-Champaign
pp. 529
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