Reto Zimmermann, "Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication," Computer Arithmetic, IEEE Symposium on, pp. 158, 14th IEEE Symposium on Computer Arithmetic (ARITH-14 '99), 1999.

@article{ 10.1109/ARITH.1999.762841,
author = {Reto Zimmermann},
title = {Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication},
journal ={Computer Arithmetic, IEEE Symposium on},
volume = {0},
year = {1999},
issn = {1063-6889},
pages = {158},
doi = {http://doi.ieeecomputersociety.org/10.1109/ARITH.1999.762841},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Computer Arithmetic, IEEE Symposium on
TI - Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication
SN - 1063-6889
SP
EP
A1 - Reto Zimmermann,
PY - 1999
KW - Modulo (2^n=B11) adders and multipliers
KW - end-around-carry parallel-prefix adders
KW - computer arithmetic
KW - VLSI circuits
KW - RNS
KW - IDEA cipher
KW - cryptography
VL - 0
JA - Computer Arithmetic, IEEE Symposium on
ER -