T. Lynch, PC Products Div., Adv. Micro Devices Inc., Austin, TX, USA
A. Ahmed, PC Products Div., Adv. Micro Devices Inc., Austin, TX, USA
M. Schulte, PC Products Div., Adv. Micro Devices Inc., Austin, TX, USA
T. Callaway, PC Products Div., Adv. Micro Devices Inc., Austin, TX, USA
R. Tisdale, PC Products Div., Adv. Micro Devices Inc., Austin, TX, USA
This paper describes the development of the transcendental instructions for the K5, AMD's recently completed x86 compatible superscalar microprocessor. A multi-level development cycle, with testing between levels, facilitated the early detection of errors and limited their effect on the design schedule. The algorithms for the transcendental functions use table-driven reductions followed by polynomial approximations. Multiprecision arithmetic operations are used when necessary to maintain sufficient accuracy and to ensure that the transcendental functions have a maximum error of one unit in the last place.
Index Terms:
microprocessor chips; floating point arithmetic; approximation theory; polynomials; encoding; K5 transcendental functions; AMD x86 compatible superscalar microprocessor; multi-level development cycle; design schedule; table-driven reductions; polynomial approximations; multiprecision arithmetic operations
Citation:
T. Lynch, A. Ahmed, M. Schulte, T. Callaway, R. Tisdale, "The K5 transcendental functions," arith, pp.163, 12th IEEE Symposium on Computer Arithmetic (ARITH-12 '95), 1995