xDSPcore: A Compiler-Based Configurable Digital Signal Processor

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July/August 2004 (vol. 24 no. 4)

pp. 67-78

	ASCII Text	x
	Andreas Krall, Ivan Pryanishnikov, Ulrich Hirnschrott, Christian Panis, "xDSPcore: A Compiler-Based Configurable Digital Signal Processor," IEEE Micro, vol. 24, no. 4, pp. 67-78, July/August, 2004.

	BibTex	x
	@article{ 10.1109/MM.2004.40, author = {Andreas Krall and Ivan Pryanishnikov and Ulrich Hirnschrott and Christian Panis}, title = {xDSPcore: A Compiler-Based Configurable Digital Signal Processor}, journal ={IEEE Micro}, volume = {24}, number = {4}, issn = {0272-1732}, year = {2004}, pages = {67-78}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2004.40}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Micro TI - xDSPcore: A Compiler-Based Configurable Digital Signal Processor IS - 4 SN - 0272-1732 SP67 EP78 EPD - 67-78 A1 - Andreas Krall, A1 - Ivan Pryanishnikov, A1 - Ulrich Hirnschrott, A1 - Christian Panis, PY - 2004 VL - 24 JA - IEEE Micro ER -

Andreas Krall, Vienna University of Technology

Ivan Pryanishnikov, Vienna University of Technology

Ulrich Hirnschrott, Vienna University of Technology

Christian Panis, Carinthian Tech Institute

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2004.40

xDSPcore is a digital signal processor (DSP) architecture that enables time- and space-efficient execution of typical digital signal applications written in high-level languages. Our evaluation shows that the corresponding compiler can use all the DSP features as efficiently as a programmer coding in assembly language.

Citation:

Andreas Krall, Ivan Pryanishnikov, Ulrich Hirnschrott, Christian Panis, "xDSPcore: A Compiler-Based Configurable Digital Signal Processor," IEEE Micro, vol. 24, no. 4, pp. 67-78, July/Aug. 2004, doi:10.1109/MM.2004.40

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