A Chip Multithreaded Processor for Network-Facing Workloads

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March/April 2004 (vol. 24 no. 2)

pp. 20-30

	ASCII Text	x
	Sanjiv Kapil, Harlan McGhan, Jesse Lawrendra, "A Chip Multithreaded Processor for Network-Facing Workloads," IEEE Micro, vol. 24, no. 2, pp. 20-30, March/April, 2004.

	BibTex	x
	@article{ 10.1109/MM.2004.1289288, author = {Sanjiv Kapil and Harlan McGhan and Jesse Lawrendra}, title = {A Chip Multithreaded Processor for Network-Facing Workloads}, journal ={IEEE Micro}, volume = {24}, number = {2}, issn = {0272-1732}, year = {2004}, pages = {20-30}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2004.1289288}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Micro TI - A Chip Multithreaded Processor for Network-Facing Workloads IS - 2 SN - 0272-1732 SP20 EP30 EPD - 20-30 A1 - Sanjiv Kapil, A1 - Harlan McGhan, A1 - Jesse Lawrendra, PY - 2004 VL - 24 JA - IEEE Micro ER -

Sanjiv Kapil, Sun Microsystems

Harlan McGhan, Sun Microsystems

Jesse Lawrendra, Sun Microsystems

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2004.1289288

The article describes an early implementation of a chip multithreaded (CMT) processor, Sun Microsystem's technology to support its throughput computing strategy. CMT processors are designed to handle workloads consisting of multiple threads with light computational demands, typical of Web servers and other network-facing systems.

Citation:

Sanjiv Kapil, Harlan McGhan, Jesse Lawrendra, "A Chip Multithreaded Processor for Network-Facing Workloads," IEEE Micro, vol. 24, no. 2, pp. 20-30, Mar./Apr. 2004, doi:10.1109/MM.2004.1289288

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