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Power- and Complexity-Aware Issue Queue Designs
September/October 2003 (vol. 23 no. 5)
pp. 50-58
ASCII Text
x 
 
Jaume Abella, Ramon Canal, Antonio Gonz?lez, "Power- and Complexity-Aware Issue Queue Designs," IEEE Micro, vol. 23, no. 5, pp. 50-58, September/October, 2003.
 
 
BibTex
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@article{ 10.1109/MM.2003.1240212,
author = {Jaume Abella and Ramon Canal and Antonio Gonz?lez},
title = {Power- and Complexity-Aware Issue Queue Designs},
journal ={IEEE Micro},
volume = {23},
number = {5},
issn = {0272-1732},
year = {2003},
pages = {50-58},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2003.1240212},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Power- and Complexity-Aware Issue Queue Designs
IS - 5
SN - 0272-1732
SP50
EP58
EPD - 50-58
A1 - Jaume Abella,
A1 - Ramon Canal,
A1 - Antonio Gonz?lez,
PY - 2003
VL - 23
JA - IEEE Micro
ER -
 
Jaume Abella, Universitat Polit?cnica de Catalunya
Ramon Canal, Universitat Polit?cnica de Catalunya
Antonio Gonz?lez, Universitat Polit?cnica de Catalunya and Intel Barcelona Research Center

The improved performance of current microprocessors brings with it increasingly complex and power-dissipating issue logic. Recent proposals introduce a range of mechanisms for tackling this problem.

Citation:
Jaume Abella, Ramon Canal, Antonio Gonz?lez, "Power- and Complexity-Aware Issue Queue Designs," IEEE Micro, vol. 23, no. 5, pp. 50-58, Sep./Oct. 2003, doi:10.1109/MM.2003.1240212
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