Itanium 2 Processor Microarchitecture

Micro
2003
Issue No. 2 - March/April
Abstract - Itanium 2 Processor Microarchitecture

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March/April 2003 (vol. 23 no. 2)

pp. 44-55

	ASCII Text	x
	Cameron McNairy, Don Soltis, "Itanium 2 Processor Microarchitecture," IEEE Micro, vol. 23, no. 2, pp. 44-55, March/April, 2003.

	BibTex	x
	@article{ 10.1109/MM.2003.1196114, author = {Cameron McNairy and Don Soltis}, title = {Itanium 2 Processor Microarchitecture}, journal ={IEEE Micro}, volume = {23}, number = {2}, issn = {0272-1732}, year = {2003}, pages = {44-55}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2003.1196114}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Micro TI - Itanium 2 Processor Microarchitecture IS - 2 SN - 0272-1732 SP44 EP55 EPD - 44-55 A1 - Cameron McNairy, A1 - Don Soltis, PY - 2003 VL - 23 JA - IEEE Micro ER -

Cameron McNairy, Intel

Don Soltis, Hewlett-Packard

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2003.1196114

The Itanium 2 processor extends the processing power of theItanium processor family with a capable and balancedmicroarchitecture. Executing up to six instructions at a time, itprovides both performance and binary compatibility for Itanium-basedapplications and operating systems.

Citation:

Cameron McNairy, Don Soltis, "Itanium 2 Processor Microarchitecture," IEEE Micro, vol. 23, no. 2, pp. 44-55, Mar./Apr. 2003, doi:10.1109/MM.2003.1196114

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