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Table of Contents
Rajesh Gupta, Editor in Chief, IEEE Design & Test pp. 345
Radu Marculescu, Carnegie Mellon University
Petru Eles, Link?ping University pp. 354-356
Chaeseok Im, Seoul National University
Soonhoi Ha, Seoul National University pp. 358-366
Alexander Maxiaguine, Swiss Federal Institute of Technology
Samarjit Chakraborty, National University of Singapore
Simon K?, Swiss Federal Institute of Technology
Lothar Thiele, Swiss Federal Institute of Technology pp. 368-377
Paul Marchal, IMEC and Katholieke Universiteit Leuven
Francky Catthoor, IMEC and Katholieke Universiteit Leuven
Davide Bruni, University of Bologna
Luca Benini, University of Bologna
Jos? Ignacio G?mez, Universidad Complutense de Madrid
Luis Pi?uel, Universidad Complutense de Madrid pp. 378-387
Hojun Shim, Seoul National University
Naehyuck Chang, Seoul National University
Massoud Pedram, University of Southern California pp. 388-396
Sudeep Pasricha, University of California Irvine
Manev Luthra, University of California Irvine
Shivajit Mohapatra, University of California Irvine
Nikil Dutt, University of California Irvine
Nalini Venkatasubramanian, University of California Irvine pp. 398-405
Haris Lekatsas, NEC Laboratories America
J? Henkel, NEC Laboratories America
Srimat Chakradhar, NEC Laboratories America
Venkata Jakkula, NEC Laboratories America pp. 406-415
Maria Varsamou, University of Patras
Nikolaos Papandreou, Computer Technology Institute
Theodore Antonakopoulos, University of Patras pp. 416-428
An Industrial Evaluation of DRAM Tests (Abstract)
Ad J. van de Goor, Delft University of Technology pp. 430-440 pp. 441-446
Erich Marschner, Cadence
Victor Berman, Cadence pp. 450-451 Usage of this product signifies your acceptance of the Terms of Use.
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