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Achieving At-Speed Structural Test
September/October 2003 (vol. 20 no. 5)
pp. 26-33
ASCII Text
x 
 
Stephen Pateras, "Achieving At-Speed Structural Test," IEEE Design and Test of Computers, vol. 20, no. 5, pp. 26-33, September/October, 2003.
 
 
BibTex
x
 
@article{ 10.1109/MDT.2003.1232253,
author = {Stephen Pateras},
title = {Achieving At-Speed Structural Test},
journal ={IEEE Design and Test of Computers},
volume = {20},
number = {5},
issn = {0740-7475},
year = {2003},
pages = {26-33},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1232253},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Achieving At-Speed Structural Test
IS - 5
SN - 0740-7475
SP26
EP33
EPD - 26-33
A1 - Stephen Pateras,
PY - 2003
VL - 20
JA - IEEE Design and Test of Computers
ER -
 
Stephen Pateras, LogicVision

Editor's note:
In addition to structural test, BIST offers an alternative low-cost approach to at-speed testing. How should BIST be implemented to address at-speed testing? What issues remain to be solved? How can we deal with multicycle paths and different frequency domains? The author describes BIST implementation techniques to answer these questions.
—Kwang-Ting Cheng, University of California, Santa Barbara

Citation:
Stephen Pateras, "Achieving At-Speed Structural Test," IEEE Design and Test of Computers, vol. 20, no. 5, pp. 26-33, Sep./Oct. 2003, doi:10.1109/MDT.2003.1232253
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