HD2BIST?a complete hierarchical framework for BIST scheduling, data-patterns delivery, and diagnosis of complex systems?maximizes and simplifies the reuse of built-in test architectures. HD2BIST optimizes flexibility for chip designers planning an overall SoC test strategy by defining a test access method that provides direct virtual access to each core of the system.
Citation:
Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian, "A Hierarchical Infrastructure for SoC Test Management," IEEE Design and Test of Computers, vol. 20, no. 4, pp. 32-39, July/Aug. 2003, doi:10.1109/MDT.2003.1214350 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||