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Compacting Test Responses for Deeply Embedded SoC Cores
July/August 2003 (vol. 20 no. 4)
pp. 22-30
ASCII Text
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Ozgur Sinanoglu, Alex Orailoglu, "Compacting Test Responses for Deeply Embedded SoC Cores," IEEE Design and Test of Computers, vol. 20, no. 4, pp. 22-30, July/August, 2003.
 
 
BibTex
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@article{ 10.1109/MDT.2003.1214349,
author = {Ozgur Sinanoglu and Alex Orailoglu},
title = {Compacting Test Responses for Deeply Embedded SoC Cores},
journal ={IEEE Design and Test of Computers},
volume = {20},
number = {4},
issn = {0740-7475},
year = {2003},
pages = {22-30},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1214349},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Compacting Test Responses for Deeply Embedded SoC Cores
IS - 4
SN - 0740-7475
SP22
EP30
EPD - 22-30
A1 - Ozgur Sinanoglu,
A1 - Alex Orailoglu,
PY - 2003
VL - 20
JA - IEEE Design and Test of Computers
ER -
 
Ozgur Sinanoglu, University of California, San Diego
Alex Orailoglu, University of California, San Diego

Test bandwidth allocation issues greatly limit parallel testing of SoC cores. Here, the authors propose a response compaction methodology for reducing the required output core bandwidth, enabling increased parallelism among core tests and hence reducing overall SoC test time.

Citation:
Ozgur Sinanoglu, Alex Orailoglu, "Compacting Test Responses for Deeply Embedded SoC Cores," IEEE Design and Test of Computers, vol. 20, no. 4, pp. 22-30, July/Aug. 2003, doi:10.1109/MDT.2003.1214349
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