A Practical Methodology for Verifying Pipelined Microarchitectures July/August 2003 (vol. 20 no. 4) pp. 4-14
Editor's note: Complete formal verification has thus far never been achieved for a state-of-the-art, high-performance commercial microprocessor. However, this article presents a completion functions methodology, based on theorem proving, that has been applied successfully to a large variety of example pipelined architectures.—?Carl Pixley, Synopsys
Citation:
Ravi Hosabettu, Ganesh Gopalakrishnan, Mandayam Srivas, "A Practical Methodology for Verifying Pipelined Microarchitectures," IEEE Design and Test of Computers, vol. 20, no. 4, pp. 4-14, July/Aug. 2003, doi:10.1109/MDT.2003.1214347 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||