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Infrastructure IP for Configuration and Test of Boards and Systems
May/June 2003 (vol. 20 no. 3)
pp. 78-87
ASCII Text
x 
 
C. J. Clark, Mike Ricchetti, "Infrastructure IP for Configuration and Test of Boards and Systems," IEEE Design and Test of Computers, vol. 20, no. 3, pp. 78-87, May/June, 2003.
 
 
BibTex
x
 
@article{ 10.1109/MDT.2003.1198689,
author = {C. J. Clark and Mike Ricchetti},
title = {Infrastructure IP for Configuration and Test of Boards and Systems},
journal ={IEEE Design and Test of Computers},
volume = {20},
number = {3},
issn = {0740-7475},
year = {2003},
pages = {78-87},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1198689},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Infrastructure IP for Configuration and Test of Boards and Systems
IS - 3
SN - 0740-7475
SP78
EP87
EPD - 78-87
A1 - C. J. Clark,
A1 - Mike Ricchetti,
PY - 2003
VL - 20
JA - IEEE Design and Test of Computers
ER -
 
C. J. Clark, Intellitech Corp.
Mike Ricchetti, Intellitech Corp.

Editor?s note:

Embedding infrastructure IP to optimize chip-level manufacturing test and debugging has recently become common practice. However, adopting the same approach for boards and systems requires a different family of infrastructure IP. This article introduces such a family and discusses how it can optimize manufacturing test and debugging, as well as support configurability, especially in today?s reconfigurable products.
--Yervant Zorian, Virage Log

Citation:
C. J. Clark, Mike Ricchetti, "Infrastructure IP for Configuration and Test of Boards and Systems," IEEE Design and Test of Computers, vol. 20, no. 3, pp. 78-87, May/June 2003, doi:10.1109/MDT.2003.1198689
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