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Design Techniques for EEPROMs Embedded in Portable Systems on Chips
January/February 2003 (vol. 20 no. 1)
pp. 68-75
ASCII Text
x 
 
Jean Michel Daga, Caroline Papaix, Marc Merandat, Stephane Ricard, Giuseppe Medulla, Jeanine Guichaoua, Daniel Auvergne, "Design Techniques for EEPROMs Embedded in Portable Systems on Chips," IEEE Design and Test of Computers, vol. 20, no. 1, pp. 68-75, January/February, 2003.
 
 
BibTex
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@article{ 10.1109/MDT.2003.1173055,
author = {Jean Michel Daga and Caroline Papaix and Marc Merandat and Stephane Ricard and Giuseppe Medulla and Jeanine Guichaoua and Daniel Auvergne},
title = {Design Techniques for EEPROMs Embedded in Portable Systems on Chips},
journal ={IEEE Design and Test of Computers},
volume = {20},
number = {1},
issn = {0740-7475},
year = {2003},
pages = {68-75},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1173055},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Design Techniques for EEPROMs Embedded in Portable Systems on Chips
IS - 1
SN - 0740-7475
SP68
EP75
EPD - 68-75
A1 - Jean Michel Daga,
A1 - Caroline Papaix,
A1 - Marc Merandat,
A1 - Stephane Ricard,
A1 - Giuseppe Medulla,
A1 - Jeanine Guichaoua,
A1 - Daniel Auvergne,
PY - 2003
VL - 20
JA - IEEE Design and Test of Computers
ER -
 

These design techniques target EEPROMs embedded in portable, battery-powered devices that operate under a wide supply voltage range. A current-controlled ring oscillator provides stable programming pulse generation, optimizing write time. Logic delay optimization and a word line boosting technique decrease read access time.

Citation:
Jean Michel Daga, Caroline Papaix, Marc Merandat, Stephane Ricard, Giuseppe Medulla, Jeanine Guichaoua, Daniel Auvergne, "Design Techniques for EEPROMs Embedded in Portable Systems on Chips," IEEE Design and Test of Computers, vol. 20, no. 1, pp. 68-75, Jan./Feb. 2003, doi:10.1109/MDT.2003.1173055
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