Testing and Characterization of SDRAMs

Design&Test
2003
Issue No. 1 - January/February
Abstract - Testing and Characterization of SDRAMs

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January/February 2003 (vol. 20 no. 1)

pp. 42-50

	ASCII Text	x
	J?erg E. Vollrath, "Testing and Characterization of SDRAMs," IEEE Design and Test of Computers, vol. 20, no. 1, pp. 42-50, January/February, 2003.

	BibTex	x
	@article{ 10.1109/MDT.2003.1173052, author = {J?erg E. Vollrath}, title = {Testing and Characterization of SDRAMs}, journal ={IEEE Design and Test of Computers}, volume = {20}, number = {1}, issn = {0740-7475}, year = {2003}, pages = {42-50}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1173052}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Design and Test of Computers TI - Testing and Characterization of SDRAMs IS - 1 SN - 0740-7475 SP42 EP50 EPD - 42-50 A1 - J?erg E. Vollrath, PY - 2003 VL - 20 JA - IEEE Design and Test of Computers ER -

J?erg E. Vollrath, Infineon Technologies AG

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1173052

To improve yield and product quality, SDRAM manufacturers perform a variety of tests. A test sequence that incorporates retention tests, signal margin tests, and speed tests can help manufacturers find and repair weak memory cells.

Citation:

J?erg E. Vollrath, "Testing and Characterization of SDRAMs," IEEE Design and Test of Computers, vol. 20, no. 1, pp. 42-50, Jan./Feb. 2003, doi:10.1109/MDT.2003.1173052

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