Application-Specific Instruction Memory Customizations for Power-Efficient Embedded Processors

Design&Test
2003
Issue No. 1 - January/February
Abstract - Application-Specific Instruction Memory Customizations for Power-Efficient Embedded Processors

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January/February 2003 (vol. 20 no. 1)

pp. 18-25

	ASCII Text	x
	Peter Petrov, Alex Orailoglu, "Application-Specific Instruction Memory Customizations for Power-Efficient Embedded Processors," IEEE Design and Test of Computers, vol. 20, no. 1, pp. 18-25, January/February, 2003.

	BibTex	x
	@article{ 10.1109/MDT.2003.1173049, author = {Peter Petrov and Alex Orailoglu}, title = {Application-Specific Instruction Memory Customizations for Power-Efficient Embedded Processors}, journal ={IEEE Design and Test of Computers}, volume = {20}, number = {1}, issn = {0740-7475}, year = {2003}, pages = {18-25}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1173049}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Design and Test of Computers TI - Application-Specific Instruction Memory Customizations for Power-Efficient Embedded Processors IS - 1 SN - 0740-7475 SP18 EP25 EPD - 18-25 A1 - Peter Petrov, A1 - Alex Orailoglu, PY - 2003 VL - 20 JA - IEEE Design and Test of Computers ER -

Peter Petrov, University of California, San Diego

Alex Orailoglu, University of California, San Diego

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1173049

An encoding technique exploits application information to reduce power consumption along the instruction memory communication path in embedded processors. Microarchitectural support enables reprogrammability of the encoding transformations to track specific code effectively, and the restriction to functional transformations delivers major power savings. Having reprogrammable hardware also allows flexible, inexpensive switches between transformations.

Citation:

Peter Petrov, Alex Orailoglu, "Application-Specific Instruction Memory Customizations for Power-Efficient Embedded Processors," IEEE Design and Test of Computers, vol. 20, no. 1, pp. 18-25, Jan./Feb. 2003, doi:10.1109/MDT.2003.1173049

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