It is the time to thank some of our dedicated editorial board members who are retiring, and to welcome new members to the board. The Associate Editors who have successfully completed their term are: Alok Choudhary, Sandhya Dwarkadas, Mootaz Elnozahy, Margret Martonosi, Keshav Pingali, Ramesh Sitaraman, and Taib Znati. I thank all of them for their commitment and effort during their tenure on the board. They have shown professionalism at the highest level. They have helped to maintain the high standard and quality of our journal. I would like to express my deepest appreciation for their contribution.

I also welcome a group of distinguished and highly qualified new members to our board. These new members cover a wide range of specialized areas. I am very proud to present them to you. Their biographies appear below and on the following pages: Rudolf Eigenmann, Antonio Gonzalez, Gyungho Lee, Jim Plank, Umakishore Ramachandran, and Rajeev Thakur.

I believe they will bring new ideas and new enthusiasm to our journal. With the healthy rotation of these new Associate Editors on the editorial board, we will continue to bring our readers the best research papers produced in our research community in a timely fashion.

Pen-Chung Yew

Rudolf Eigenmann received the PhD degree in electrical engineering/computer science in 1988 from ETH Zurich, Switzerland. He is a professor at the School of Electrical and Computer Engineering at Purdue University. His research interests include parallel computing, optimizing compilers, programming methodologies and tools, performance evaluation, and Internet computing. He has published more than 100 technical papers is these areas. He is the recipient of a 1997 US National Science Foundation CAREER award and serves on the editorial boards of the International Journal of Parallel Programming, IEEE Transactions on Parallel and Distributed Computing, and the IEEE Computing in Science and Engineering Magazine. He has also served as the chairman/vice-chairman of the High-Performance Group of the Standard Performance Evaluation Corporation (SPEC). His areas of expertise are optimizing compilers for parallel computing, programming methodologies and tools, performance evaluation, and Internet computing. He is a member of the IEEE, ACM, and ASEE.

Antonio Gonzalez received a degree in computer engineering in 1986 and the PhD degree in computer engineering in 1989, both from the Universitat Polit�cnica de Catalunya at Barcelona, Spain. He has occupied different faculty positions in the Computer Architecture Department at the Universitat Polit�cnica de Catalunya since 1986, with tenure since 1990, and he is currently a professor in this department. He is also the director of the Intel-UPC Barcelona Research Center. His research interests center on computer architecture, compilers and parallel processing, with a special emphasis on processor microarchitecture, memory hierarchy, and code generation. He has published more than 150 technical papers on these topics in international journals and symposia, and has advised more than 20 PhD candidates on these areas. He has participated in 30 R&D projects and has led 20 of them. He has served in the program committee of more than 40 international symposia and is a frequent referee of several international journals. His areas of expertise are processor microarchitecture and code generation and optimization.

Gyungho Lee received the MS degree from the Korea Advanced Institute of Science and Technology in 1979, and the PhD degree from the University of Illinois at Urbana-Champaign in 1996, both in computer science. He is currently a full professor of computer engineering in the Department of Electrical and Computer Enginnering, University of Illinois at Chicago. His research and teaching interests are in computer/networking hardware architecture, microprocessor design, and computer/network system security. His industrial experience includes leading the efforts of developing CPU business based on Digital Alpha 21264 in 1998, and developing a shared-bus symmetric multiprocessor SSM7000 from 1991 to 1992, both for Samsung Electronics. His academic research experience includes participating in a parallelizing compiler project (Parafrase) and a shared memory multiprocessor project (Cedar) at the University of Illinois at Urbana-Champaign. From 1992 to 1996, he led the DICE project at the University of Minnesota, which invented the bus-based cache-only memory multiprocessor (US patent no. 5,692,149), self-invalidation (US patent no. 5,835,950), and a noninclusive memory access mechanism for distributed shared-memory multiprocessors (US patent no. 5,937,431). He was a corecipient (with C. Kruskal and D. Kuck) of the 1986 Outstanding Paper Award from the 15th IEEE International Conference on Parallel Processing, St. Charles, Illinois, for the work on “combining switch” and the (with Lan Li) 2003 Best Paper Award from the 12th IEEE International Conference on Computer Communications and Networks, Dallas, Texas, for the work on denial-of-service detection in the Internet. He is currently a subject area editor (advanced architecture and networks) for the Journal of Parallel and Distributed Computing, and is on the editorial board for the Journal of Parallel Computing. He also served as a distinguished visitor of the IEEE Computer Society from 2000 to 2002.

Jim Plank received the BS degree from Yale in 1988, and the PhD degree from Princeton in 1993. He is an assocate professor in the Department of Computer Science at the University of Tennessee. He has been at the University of Tennessee since 1993. Professor Plank is also the codirector of the Logistical Computing and Internetworking Laboratory, whose mission is to employ end-to-end principles to provision networks with scalable computation and storage functionalities in addition to standard communication. To that end, he has been responsible for directing the development of the Logistical Backbone (L-Bone), which is a global storage network composed of more than 21 TB of publicly available storage on more than 250 servers on five continents, and the Logistical Runtime System (LoRS), which enables clients to treat these storage servers as basic disk blocks in a global file system. Additionally, Professor Plank is an expert in fault-tolerant computing systems, focusing specifically on checkpointing and rollback recovery, and applying erasure coding techniques to network storage systems. Professor Plank is a member of the IEEE Computer Society, has chaired conferences in network storage and network applications, and has left a legacy of publicly available software that includes: Jgraph: a graph-plotting package for PostScript, Ickp: a checkpointing utility for the Intel Paragon, Libckpt: a checkpointing utility for Unix, IBP: network storage depots and their client code, LoRS: tools for aggregation of network storage depots, and GFLib: a package for performing Reed-Solomon coding for storage systems.

Umakishore Ramachandran received the PhD degree in computer science from the University of Wisconsin, Madison, in 1986, and is currently a professor in the College of Computing at the Georgia Institute of Technology. His fields of interest include parallel and distributed systems, computer architecture, and operating systems. He was a coprincipal investigator for the Clouds distributed operating system project at Georgia Tech in the late 1980s. In the early 1990s, he led a parallel computing project that investigated the software and hardware mechanisms for building scalable shared memory systems, and studying the scalability of parallel systems from an applications perspective. Since the late 1990s, he has been involved in cluster computing research with a special focus on supporting interactive graphics applications and interactive media-oriented applications. He led the design and development of two such cluster systems: Beehive and Stampede. Currently, he is leading a US National Science Foundation-ITR funded project that investigates the programming idioms and runtime systems for a distributed sensing infrastructure. He was the recipient of a US National Science Foundation PYI Award in 1990, the Georgia Tech doctoral thesis advisor award in 1993, the College of Computing Outstanding Senior Research Faculty award in 1996, and the College of Computing Dean's Award in 2003.

Rajeev Thakur received the BE degree in computer engineering from the University of Bombay, India, in 1990, the MS degree in computer engineering from Syracuse University in 1992, and the PhD degree in computer engineering from Syracuse University in 1995. He is a computer scientist in the Mathematics and Computer Science Division at Argonne National Laboratory.His research interests are in the area of high-performance computing in general and high-performance communication and I/O, in particular. He was a member of the MPI Forum and participated actively in the definition of the I/O part of the MPI-2 standard. He is also the the author of a widely used, portable implementation of MPI-IO, called ROMIO. He is currently involved in the development of MPICH-2, a new portable implementation of MPI-2. Dr. Thakur is a coauthor of the book Using MPI-2: Advanced Features of the Message Passing Interface, published by MIT Press. He has served on the program committees of several conferences and has also served as a coguest editor for a special issue of the International Journal of High-Performance Computing Applications on “I/O in Parallel Applications.”