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JANUARY/FEBRUARY 2006 (Vol. 23, No. 1) p. 71
0740-7475/06/$25.00 © 2006 IEEE

Published by the IEEE Computer Society
2005 International Test Conference
Ken Butler , ITC 2005 Program Chair
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The 36th annual IEEE International Test Conference convened from 8 to 10 November 2005 in Austin, Texas. The location was a significant move for ITC: It was the first time the conference had met west of the Mississippi, as ITC's general chair Rob Aitken pointed out during his introduction at the plenary session.
The plenary session, arranged by Program Vice Chair Anne Gattiker, kicked off the conference. The conference theme, "Test: Survival of the Fittest," called to mind the test industry's rapidly evolving and increasingly competitive nature, especially of recent years. Continuing that theme, John Kibarian, chief executive officer of PDF Solutions, delivered the keynote speech, "The Nature of Yield Ramping: Keeping Ahead of Evolution." His talk focused on the shift of today's driver products to consumer applications, and their comparatively lower sales prices and higher volumes than previous process drivers. These products demand rapid yield ramps, which in turn require rapid identification and elimination of yield and reliability issues. Janak Patel gave the invited address, "Test Research: Past, Present and Future," reviewing the major developments in test across the decades, with an emphasis on academic research. Patel suggested that "holy grail" test problems remain and encouraged the audience to work on them.
One of the more notable evolutionary mutations in the test industry is the shift from high-performance to low-cost ATE, and the concomitant migration of more test functionality onto the chip. ITC 2005 presented numerous papers related to these subjects, such as Paper 6.3, "Drive-only At-Speed Functional Testing: One of the Techniques Intel is Using to Control Test Costs," presented by Mike Tripp. It discusses the difficult problem of testing high-speed interfaces on relatively lower-performance ATE by adding special DFT features.
The drive to very-deep submicron technologies ushers in far more process variability than in earlier generations. This fact, combined with new and more subtle defect mechanisms, makes it increasingly difficult to make a simple pass/fail decision during test. The industry's response is to shift the ATE focus to that of rapid data collection, and then allow software to postprocess the data to decide which parts continue through manufacturing and which don't. Rob Daasch organized Lecture Series 13, "Production Data-Driven Statistical Testing," which included three excellent and very-well-attended presentations devoted to this important topic.
The conference had outstanding representation in other diverse and important areas. Examples include three sessions on delay testing, four on mixed-signal and RF testing, two on microprocessor testing and debug; two sessions and an application series on very-high-frequency and jitter testing; and three sessions on ATE software and hardware. The very successful Board and System Test track also returned in 2005.
Another first for ITC in 2005 was that it was the first year without printed proceedings, which enabled the use of color in the papers. The very popular presentation CD returned this year, which gave attendees the opportunity to, in a sense, take the conference home with them.
ITC Test Week ended with three workshops. The System Test and GHz Test workshops each returned for another strong showing. New to ITC this year was the Silicon Debug and Diagnosis Workshop, which was particularly appropriate to the theme of ITC 2006, "Getting More Out of Test," which emphasizes the increasingly larger role test plays throughout the life cycle of a product. The submission deadline for ITC 2006 is 17 February 2006, and the conference will take place in Santa Clara, California.
All in all, ITC 2005 saw resurgence in attendance and participation, and we look to ITC 2006 to be stronger still.
CONTRIBUTIONS TO CONFERENCE REPORTS: Send conference reports to Yervant Zorian, Virage Logic, 47100 Bayside Parkway, Fremont, CA 94538; zorian@viragelogic.com.