ASYNCHRONOUS DESIGN


IEEE Design & Test of Computers, September/October 2011, pp. 52–61

The stack chip: layout plot

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An Evaluation of Asynchronous Stacks

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Two often-claimed benefits of asynchronous-circuit design are the potential for high average-case performance and low power consumption. We try to demonstrate these benefits through the design of a small example: a fast, energy-efficient stack. Our asynchronous circuit consists of a control path and a data path. The control path steers the data via splits and merges, and generates the signals that dictate the data movements in the data path, just as a clock dictates the data movements in a synchronous circuit. In the asynchronous circuit, however, the control path generates the move signals only when and where needed. READ FULL ARTICLE (login required) »

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