Software Standards for the Multicore Era
by Jim Holt, Anant Agarwal, Sven Brehmer, Max Domeika, Patrick Griffin, and Frank Schirrmeister
Pushing single-thread performance is no longer viable for further scaling of microprocessor performance, due to this approach's unacceptable power characteristics. Current and future processor chips will comprise tens to thousands of cores and specialized hardware acceleration to achieve performance within power budgets.4-7 Hardware designers find it relatively easy to design multicore systems. But multicore presents new challenges to programmers, including finding and implementing parallelism, dealing with debugging deadlocks and race conditions (that is, conditions that occur when one or more software tasks attempt to access shared program variables without proper synchronization), and eliminating performance bottlenecks.