BIST FOR EMBEDDED MEMORIES


IEEE Design & Test of Computers, March/April 2009

Hybrid BIST Scheme for Multiple Heterogenous Embedded Memories

Hybrid BIST Scheme for Multiple Heterogenous Embedded Memories

by Li-Ming Denq, Yu-Tsao Hsing, and Cheng-Wen Wu

Embedded memories are widely used in SoCs. Unfortunately, the high density and capacity of embedded memories make them more prone to manufacturing defects than logic circuits. To increase SoC yield and reliability and reduce the yield ramp-up period, efficient testing and diagnostic methodologies for embedded memory are necessary. Accessing the embedded RAMs from an external tester is costly—in terms of pin overhead, performance penalty, and timing accuracy issues. Because testing embedded memories using external ATE would require an excessive amount of primary I/O pins, and at-speed testing would be difficult to achieve, BIST is more practical for embedded-memory testing and diagnosis.

Read more

Subscribe to IEEE Design & Test of Computers

IEEE Design & Test of Computers magazine offers works describing the methods used to design and test electronic product hardware and supportive software.

Current issue:
Flexible Electronics

This month: TRUST MANAGEMENT

What else is new?

A New Era of Presidential Security: The President and His BlackBerry
Although Obama persuaded his security staff to let him keep using his BlackBerry, it’s unclear how the device was modified to ensure extra security.

Information-Seeking Support Systems
Seeking information for complex mental activities requires tools and services that help people manage, analyze, and share retrieved information.

Ten Ideas for Policymakers to Drive Digital Progress
Read about 10 guiding principles for creating technology policy that spurs and sustains digital progress.

What Wearable Augmented Reality Can Do for You
This article takes a look at augmented reality—what it is and what it can do for you.

Hybrid BIST Scheme for Multiple Heterogenous Embedded Memories
This novel hybrid BIST architecture reduces routing penalty while allowing at-speed test and diagnosis of memory cores.

Voice Processors Based on the Human Hearing System
This article describes an emerging signal-processing chip for use in mobile phones and PCs.