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Title: Professor, Department of Electrical and Computer Engineering, University of Texas at Austin>

Academic degree: PhD in electrical engineering, Stanford University

Career highlights: National Science Foundation Early Faculty Career Award, 1997; College of Engineering Foundation Faculty Award, 2001; Best Paper Award at the VLSI Test Symposium, 2001; Best Panel Award at the International Test Conference, 2005: General Motors Faculty Fellowship, 2006; Best Paper Award at the International Symposium on Defect and Fault Tolerance, 2008

CS activities: Program Chair for the 2008 International Test Conference and 2008 International Test Synthesis Workshop; general chair for the 2007 Defect and Fault Tolerance Symposium; program committee for a number of other test-related conferences.


Design and Test Research

An interview with Nur A. Touba

The most valuable lifelong skill that Nur Touba picked up while working toward his doctorate in electrical engineering was mastering effective written and oral communication. Now a professor in University of Texas at Austin's Department of Electrical and Computer Engineering, Touba is passing that same lesson on to his students. In an interview with the IEEE Computer Society's Dick Price, Touba reflects on his education, teaching, and the design-and-test research that he has made his specialty. 

DP: Tell me, where are you in your career right now?

NAT: Well, I received my PhD from Stanford in 1996. After that, I immediately started a faculty position at the University of Texas at Austin. I've been at UT for 12 years now. I do research and design for test, basically looking at ways to add features to integrated circuits to make them easier to test—reducing the cost and increasing the quality of manufacturing tests.

DP: What drew you to the career path you've chosen?

NAT: I got a computer when I was in junior high, in the day when the Apple II computers were just coming out. Not too many people had computers at home—they weren't cheap in those days. I was fortunate that my father was willing to make that investment.

I learned everything about that computer. I'd write software in assembly code and I was really fascinated by computers. That's kind of what got me into electrical engineering.

DP: As you moved along, especially into college, was there something or someone that was especially influential in your career choices?

NAT: Well, when I was finishing my undergraduate degree, I got accepted at several top grad schools and I was trying to figure out which one to pick. My undergraduate advisor showed me some books that were written by Ed McCluskey; he suggested that I go to Stanford and work with him.

It turned out to be really good advice. Without a doubt, my PhD advisor, Ed McCluskey, was the biggest influence on me. He taught me a lot of really valuable things that have helped me a lot in my career. I try to pass those things onto my students.

He really emphasized clearly presenting your results both in writing and in oral presentations. If people don't understand your work, you won't have any impact. I try to emphasize that to my students as well.

DP: How did you go about developing the skills to present your ideas well?

NAT: That's another thing that where Ed McCluskey helped me out a lot. I would write a draft of a paper and drop it off at his house and then he would go through it with, I don't know, three or four different colored pens and mark it up. He really was a stickler for getting the writing clear and precise.

It was the same thing with oral presentations. We would do dry runs and he would really, you know, work with us on it. I learned a lot from that and I try to do that for my students as well.

DP: Very cool. So in 12 years into your career, is there a “smartest decision” you made along the way?

NAT: Yes, I've always emphasized quality over quantity. I'd rather publish a smaller number of high quality papers. I push my students to find novel approaches to problems rather than just incremental improvements on earlier work.

That’s really paid off. It's resulted in some better research output for us.

DP: Is there any missed opportunity that you wished you could go back and pick up on?

NAT: Missed opportunity? You know, you always see the paper that comes out that you had that idea, too, and you just didn't act on it. I've had those experiences but I don't think there's anything really striking that I missed out on.

One of the mistakes that I've made in the past is just getting too large of a research group and spreading myself too thin. Then I kind of feel terrible because I can't spend as much time with my students doing a good job advising them as I'd like. I’ve learned to limit the number of students that I work with at a time.

DP: I understand you have a big role in the upcoming International Test Conference. Could you tell us a little bit about your role and also about the conference?

NAT: I'm the ITC Program Chair this year. It's been a lot of work but I think we put together a great program. ITC is the flagship conference in the test community. It basically focuses on all aspects of test including at the chips, board, and system level.

Anyone interested in test or even those new to the field will find a lot of value in the conference. We have really good papers, panels, tutorials, and plenary speakers lined up. We also have a large exhibit floor where a lot of companies come to exhibit. You can learn a lot by the latest tools and techniques being used in industry on the exhibit floor.

DP: What kind of people typically come to this conference?

NAT: It's mostly people from industry. We have test engineers, people from EDA (electronic design automation) companies, designers, and good share of academic attendees—a mix of different people. It's going to be in Santa Clara and it's right in the Santa Clara convention center.

DP: What do you personally most look forward to out of this conference?

NAT: I think we've got some really interesting plenary speakers lined up. Bob Pease—a legend in the analog community—is going to be having an interactive conversation about his 48 years of experience. He's a really interesting guy.

Yon Rebi, who's a well-known professor from Berkeley, is going to talk about the future of computing and what it means for verification and test. Then we've also got some really good embedded tutorials that I think will be really informative. So I'm pretty excited about the program.

DP: So what does a Program Chair do exactly?

NAT: It's mostly coordinating the review process for papers and panels. We have a program committee of on the order of 50 people. Basically, I manage that whole process and set the direction for some of the things that are done at the conference. We're trying a few new things this year.

We're having a poster session, which is different than the poster sessions that you see at most conferences. We had a totally separate submission process for the poster session and we're trying to tap into people out there who have very interesting data but just don't have time to write up a 10-page paper about it.

DP: This conference has been going quite a long time.

NAT: I've been going since I was a graduate student—since 1994. The conference itself started way back around 1980 or even earlier.

I encourage people to come and check it out. I think even those that are not directly in the test community would still find it of value particularly designers and those that work with design-for-test (DFT) tools and techniques.

DP: What other kind of involvements have you had with IEEE Computer Society?

NAT: I've been on the organizing committee for several Computer Society-sponsored conferences and workshops. It's always a lot of work to put the technical meetings together, but always very rewarding to see them come together.

Certainly these meetings are essential for people in the field to exchange ideas and network. The best way to keep in touch with what's going on in the field is to attend these meetings.

I’ve also served as a guest editor for Design and Test Magazine. And I haven't - other than that I haven't done any other editing functions.

DP: What advice would you give a recent graduate or a graduate student if they wanted to pursue a career like yours?

NAT: I'd say go to graduate school and find a good advisor. Your advisor has a big influence on steering you towards good research problems and setting the bar for the quality of your work.

I'd also say read as many papers as you can and really fully try to fully understand the work that's been done in your field. You can't make new contributions until you know what's already been done. Also, attend as many conferences and workshops as you can. Meet people in the field. Learn what's going on, what the important problems are.

DP: So what do you think will be the most startling development in your field in the next five or ten years?

NAT: Well, right now after a chip is manufactured, it's tested and the test fails, generally the chip is discarded. In the future, we're going to see a lot more use of repair techniques.

Currently, repairs used in some cases in memory where you have some extra rows and columns in the memory. If you have a defective cell, you can reconfigure the memory to use those spare rows and columns.

In the future, we're going to see repair techniques used in all parts of the chip. This is going to be necessary to improve yield in the future as we develop increasingly difficult manufacturing processes that are harder to control.

DP: What benefit will that be? Will that cut cost or give more functionality?

NAT: It'll be a way to keep the yield up. Without using repair techniques, the yield is going to drop too low. Like I say, most of what's done now is just a go/no go test. In the future, it's going to really be integrated with repair. CW (October 2008)




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