Michael J. Flynn

1995 Harry H. Goode Memorial Award Recipient

"For pivitor and seminal contributions to the design and classification of computer architecture."


Michael Flynn was born in New York in 1934.  He received his BSEE from Manhattan College (1955), MS from Syracuse University (1960) and PhD from Purdue Univ. (1961).

Dr. Flynn joined IBM in 1955 and spent 10 years there working in the areas of circuit design and computer design and architecture.  He was design manager of the prototype of the IBM 7090 -- a machine that became the standard large scientific processor throughout the 1960s.  When he returned from Purdue in 1961 he worked on System 360 Architecture becoming design manager responsible for the System 360 Model 90 series processors.  For over a decade after their introduction in 1967 these machines were the fastest and most sophisticated computers in IBM’s line; introducing out of order instruction execution, loop buffering, multiplicative divide, etc.

Dr. Flynn was Associate Professor of Electrical Engineering at Northwestern University from 1966-70 and Professor of Computer Science at Johns Hopkins University from 1970-75.  During this time he introduced the now familiar stream outline of computer organization (SIMD, etc.) and he co-authored the first detailed discussion of techniques for the simultaneous issuance of multiple instructions-a now standard approach to implementing high speed microprocessors.

In 1972 he co-founded (with Max Paley) a computer design and consulting firm, Palyn Assoc. Palyn (now Palyn Gould) is one of the best known such firms.

Dr. Flynn became Professor of Electrical Engineering at Stanford in 1975 where he set up the Stanford Emulation Lab.  Using the lab facilities he set up an ambitious program to quantitatively understand the role and affect of instruction set tradeoffs.

Prof. Flynn has had a long term interest in computer arithmetic.  He co-authored one of the standard texts on Computer Arithmetic.  He currently heads up an interdisciplinary program on sub-nanosecond Arithmetic.  This is targeted at developing techniques for realizing Gigaflop computing elements on a single multichip module with conventional silicon chip technology.  He continues an active program in parallel processor studies.  Current work includes optical interconnections for large multiprocessor ensembles and basic studies in alternative approaches to massively parallel processors.

Prof. Flynn has published over 150 papers, has several patents and has lectured extensively.  He was a Visiting Prof. at Trinity College, Dublin.  He is a fellow of both the IEEE and the ACM, a fellow of the Institution of Engineers of Ireland, named to the IEEE Computer Society’s Honor Role, and received the ACM Service Award.

Dr. Flynn was the 1992 recipient of the ACM/IEEE Eckert-Mauchly Award “for important and seminal contributions to processor organization and classification, computer arithmetic, and performance evaluation.”

He was founding Chairman of both the IEEE Computer Society’s Technical Committee on Computer Architecture and the ACM’s SIGARCH.  He was Vice President of the IEEE Computer Society and Associate Editor of the Transactions on Computers.