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Eckert-Mauchly Award                                 

Nomination Deadline: 30 March 2015                                              
The award nomination requires a minimum of 3 endorsements.
A certificate and $5,000 are awarded jointly by the ACM and the Computer Society for outstanding contributions to the field of computer and digital systems architecture.



Past Recipients for Eckert-Mauchly Award

2013 James R. Goodman For pioneering contributions to the architecture of shared-memory multiprocessors.
2012 Algirdas Avizienis For fundamental contributions to fault-tolerant computer architecture and computer arithmetic.
2011 Gurindar (Guri) S. Sohi For pioneering widely used micro-architectural techniques for instruction-level parallelism.
2010 William J. Dally For outstanding contributions to the architecture of interconnection networks and parallel computers.
2009 Joel S. Emer

For pioneering contributions to performance analysis and modeling methodologies; for design innovations in several significant industry microprocessors; and for deftly bridging research and development, academia and industry.

2008 David A. Patterson For seminal contributions to RISC microprocessor architectures, RAID storage systems design, and reliable computing, and for leadership in education and in disseminating academic research results into successful industrial products.
2007 Mateo Valero For extraordinary leadership in building a world class computer architecture research center, for seminal contributions in the areas of vector computing and multithreading, and for pioneering basic new approaches to instruction-level parallelism.
2006 James H. Pomerene For pioneering innovations in computer architecture, including early concepts in cache, reliable memories, pipelining and branch prediction, for the design of the IAS computer and for the design of the Harvest supercomputer.
2005 Robert P. Colwell For outstanding achievements in the design and implementation of industry-changing micro-architectures, and for significant contributions to the RISC/CISC architecture debate.
2004 Frederick P. Brooks, Jr. For the definition of computer architecture and contributions to the concept of computer families and to the principles of instruction set design; for seminal contributions in instruction sequencing, including interrupt systems and execute instructions; and for contributions to the IBM 360 instruction set architecture.
2003 Joseph A. (Josh) Fisher In recognition of 25 years of seminal contributions to instruction-level parallelism, pioneering work on VLIW architectures, and the formulation of the Trace Scheduling compilation technique.
2002 B. Ramakrishna (Bob) Rau For pioneering contributions to statically-scheduled instruction-level parallel processors and their compilers.
2001 John L. Hennessy For being the founder and chief architect of the MIPS Computer Systems and contributing to the development of the landmark MIPS R2000 microprocessor.
2000 Edward S. Davidson For seminal contributions to the design, implementation, and performance evaluation of high performance pipelines and multiprocessor systems.
1999 James E. Smith For fundamental contributions to high performance micro-architecture, including saturating counters for branch prediction, reorder buffers for precise exceptions, decoupled access/execute architectures, and vector supercomputer organization memory, and interconnects.
1998 Tadashi Watanabe For contributions to the architectural design of supercomputers with multiple/parallel vector pipelines and programmable vector caches.
1997 Robert Tomasulo For the ingenious Tomasulo's algorithm, which enabled out-of-order execution processors to be implemented.
1996 Yale N. Patt For important contributions to instruction level parallelism and superscalar processor design.
1995 John H. Crawford In recognition of your impact on the computer industry through your development of microprocessor technology.
1994 James E. Thornton For his pioneering work on high performance processors; for inventing the scoreboard for instruction issue; and for fundamental contributions to vector supercomputing.
1993 David Kuck For his impact on the field of supercomputing, including his work in shared memory multiprocessing, clustered memory hierarchies, compiler technology, and application/library tuning.
1992 Michael J. Flynn For his important and seminal contributions to processor organization and classification, computer arithmetic and performance evaluation.
1991 Burton Smith For pioneering work in the design and implementation of scalable shared memory multiprocessors.
1990 Kenneth Batcher For contributions to parallel computer architecture, both for pioneering theories in interconnection networks and for the pioneering implementations of parallel computers.
1989 Seymour Cray For a career of achievements that have advanced supercomputer design.
1988 Daniel P. Siewiorek For outstanding contributions in parallel computer architecture, reliability, and computer architecture education.
1987 Gene M. Amdahl For outstanding innovations in computer architecture, including pipelining, instruction look- ahead and cache memory.
1986 Harvey G. Cragon For major contributions to computer architecture and for pioneering the application of integrated circuits for computer purposes and for serving as architect of the Texas Instruments scientific computer and for playing a leading role in many other computing developments in that company.
1985 John Cocke For contributions to high performance computer architecture through look ahead, parallelism and pipeline utilization, and to reduced instruction set computer architecture through the exploitation of hardware-software tradeoffs and compiler optimization.
1984 Jack B. Dennis
1983 Tom Kilburn
1982 C. Gordon Bell
1981 Wesley A. Clark
1980 Maurice V. Wilkes
1979 Robert S. Barton


2014 Eckert-Mauchly Subcommittee Chair

Mark D. Hill


Deadline: 30 March 2014   

Nominations Are Being Sought for Eckert-Mauchly Award

LOS ALAMITOS, Calif., 4 March 2014 – Nominations are being accepted for the Eckert-Mauchly Award, which recognizes high-impact achievements in computer and digital systems architecture.

The Eckert Mauchly Award, co-sponsored by ACM and IEEE Computer Society since 1979, is known as the computer architecture community's most prestigious award.  The nomination deadline is 30 March. To make a nomination, visit

The award was named for John Presper Eckert and John William Mauchly, who collaborated on the design and construction of the Electronic Numerical Integrator and Computer (ENIAC), the pioneering large-scale electronic computing machine, which was completed in 1947.

The award comes with a $5,000 prize and will be presented at the International Symposium on Computer Architecture (ISCA) which will be held 14-18 June in Minneapolis, Minn. To register, visit

Previous Eckery-Mauchly recipients include James R. Goodman, Algirdas Avizienis, Gurindar (Guri) S. Sohi, William J. Dally,  Joel S. Emer, David A. Patterson, Mateo Valero, and others. For the full list of recipients, visit

About IEEE Computer Society

IEEE Computer Society is the world's leading computing membership organization and the trusted information and career-development source for a global workforce of technology leaders including: professors, researchers, software engineers, IT professionals, employers, and students. The unmatched source for technology information, inspiration, and collaboration, the IEEE Computer Society is the source that computing professionals trust to provide high-quality, state-of-the-art information on an on-demand basis. The Computer Society provides a wide range of forums for top minds to come together, including technical conferencespublications, and a comprehensive digital library, unique training webinarsprofessional training, and the TechLeader Training Partner Program to help organizations increase their staff's technical knowledge and expertise, as well as the personalized information tool myComputer. To find out more about the community for technology leaders, visit

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IEEE-CS and ACM Honor Pioneer of High-Performance Computer Memory Systems

LOS ALAMITOS, Calif., 23 May 2013 -- IEEE Computer Society and ACM (the Association for Computing Machinery) will jointly present the Eckert-Mauchly Award to James R. Goodman for contributions to the hardware/software interface of computer architecture.  His innovations led to the development of hybrid approaches to high-performance computer memory systems that can achieve nearly the performance of hardware but with the flexibility of software. Goodman, a computer science professor at the University of Auckland, New Zealand, previously worked at Intel Corp., where microprocessor architectures based on his work have begun to appear. The Eckert-Mauchly Award is known as the computer architecture community's most prestigious award. Goodman will receive the 2013 Eckert-Mauchly Award at the International Symposium on Computer Architecture, 26 June, in Tel Aviv, Israel.

In his seminal 1983 paper, Using Cache Memory to Reduce Processor-memory Traffic, Goodman was the first to describe what came to be known as snooping cache coherence protocols for maintaining the consistency of stored data in multiprocessing environments. The paper also identified the cache's importance in conserving memory bandwidth. This work is reflected in virtually every computer built and sold today, reflecting the broad influence of his innovations.   

Goodman was the principal co-inventor of hardware queue-based locks, which allow programs with busy-wait synchronization, also known as spinning, to scale to very large multiprocessors.  Spinning is a technique in which a process repeatedly checks to see if a condition is true. He also introduced critical section speculation, which helped launch the resurgence of transactional memory as a parallel programming and synchronization method. Transactional memory is used for controlling access to shared memory in concurrent computing, a computational processes that may be executed in parallel.  Architectures based on this work have recently begun to appear in products, including the flagship microprocessors from Intel Corp.

Goodman co-authored A Programmer's View of Computer Architecture, a highly acclaimed book on computer architecture, with Karen Miller, and Structural Computer Architecture with Andrew Tanenbaum. A principal supervisor of 10 Ph.D. students, several of which have received prominent recognition as academics and practitioners, Goodman is a Fellow of IEEE and ACM.

A graduate of the University of California, Berkeley with a Ph.D. degree, he worked for Intel Corp. while earning his degree.  He then joined the faculty at the University of Wisconsin – Madison and spent several academic years on sabbatical at AT&T Bell Laboratories, the Advanced Computer Research Laboratory in Lyon, France, and Intel Corp. before going to the University of Auckland.

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UCLA's Algirdas Avižienis Honored with Eckert-Mauchly Award

LOS ALAMITOS, Calif., 21 May, 2012 -- ACM (the Association for Computing Machinery) and the IEEE Computer Society will jointly present the Eckert-Mauchly Award to Algirdas Avižienis of the University of California, Los Angeles for fundamental contributions to fault-tolerant computer architecture and computer arithmetic. His conceptual designs led to construction of the Self-Testing and Repairing (STAR) computer at the Jet Propulsion Laboratory at California Institute of Technology, which was instrumental to the JPL mission to explore space. The Eckert-Mauchly award is known as the computer architecture community's most prestigious award. Avižienis will receive the 2012 Eckert-Mauchly Award at the International Symposium on Computer Architecture on 12 June in Portland, Oregon.

Avižienis coined the term Fault-Tolerant Computing to capture the unique aspects of his ideas for creating a low-power, long life computer using self-repairing techniques. He chaired the first IEEE Technical Committee on Fault-Tolerant Computing in 1969, and established the first international conference. Moving to UCLA from the Jet Propulsion Laboratory, he expanded the scope of his research to fault-tolerant system architecture and dependability modeling. He extended his work on error-detecting codes for VLSI (Very Large Scale Integration) design, resulting in new techniques to implement self-checking programmable logic arrays and improved chip yields.

Continuing his contributions to the science of dependable computing, Avižienis addressed ways to provide tolerance against software faults through Multi-Version Programming. He subsequently developed redundant number systems for fast digital arithmetic, a critical element in the field of digital arithmetic and created efficient algorithms for error-coded operations.

In addition to mentoring a large number of Ph.D. and M.S. students, Avižienis established one of the first graduate courses in the US dedicated to computer algorithms and processors. When Lithuania achieved independence in 1990, he helped establish western-style research and Ph.D. programs at the national university of Lithuania, Vytautas Magnus, which is located in his home town.

A Fellow of IEEE, he is a recipient of the American Institute of Aeronautics and Astronautics (AIAA) Information Systems Award and the National Aeronautics and Space Administration (NASA) Exceptional Service Award. He also received the IEEE Computer Society Technical Achievement Award and the International Federation for Information Processing (IFIP) Silver Core Award. He earned B.S., M.S. and Ph.D. degree from the University of Illinois, Urbana-Champaign.

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Guri Sohi Wins 2011 Eckert-Mauchly Award

LOS ALAMITOS, Calif., 4 May, 2011 -- The IEEE Computer Society and ACM (the Association for Computing Machinery) will jointly present the Eckert-Mauchly Award to Gurindar S. (Guri) Sohi of the University of Wisconsin-Madison for pioneering widely used micro-architectural techniques in the design of high-performance microprocessors. These innovations increase the instruction-level parallelism, a measure of how many of the operations in a computer program can be performed simultaneously. They can be found in almost every commercial microprocessor used today in personal computers and high-end servers.

The Eckert Mauchly Award is known as the computer architecture community's most prestigious award. Sohi will receive the 2011 Eckert-Mauchly Award at the International Symposium on Computer Architecture (ISCA) held as part of the Federated Computing Research Conference (FCRC) on 7 June in San Jose, CA.

Early in his career, Sohi articulated a model for a dynamically scheduled processor supporting precise exceptions. This model has served as the basis for many commercial superscalar microprocessors that have been designed and built since the early 1990s. His group also proposed the idea of memory dependence prediction to further improve instruction-level parallelism, a technology that has been considered a key innovation in some recent microprocessors. His work on memory systems for superscalar processors was instrumental in influencing high-end microprocessors to switch from blocking to non-blocking caches.

Sohi also invented the multiscalar paradigm, which pioneered the concepts of thread-level speculation that permit a single, sequential program to be executed in parallel on multiple processing cores. These concepts have also been adopted by several multicore processor designs and continue to influence thinking about how to design future microprocessors.

In addition to a variety of other contributions to processor and memory hierarchy design, Sohi has educated and trained many successful Ph.D graduates who have gone on to make their own impact in the field. He continues to supervise a small group of students investigating how to execute programs in parallel on multicore processors.

A recipient of the 1999 Maurice Wilkes Award from ACM SIGARCH (Special Interest Group on Computer Architecture), Sohi is a Fellow of ACM and the IEEE. He was elected to the National Academy of Engineering in 2009. He has been at the University of Wisconsin-Madison since 1985 where he is currently the John P. Morgridge Professor and the E. David Cronon Professor of Computer Sciences. From 2004-2008, he served as chair of the Computer Sciences Department. He received a B.E degree from the Birla Institute of Technology and Science (Pilani, India) and M.S and Ph.D. degrees in Electrical and Computer Engineering from the University of Illinois.

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