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Eckert-Mauchly Award
Past Recipients for Eckert-Mauchly Award
| 2012 | Algirdas Avizienis | For fundamental contributions to fault-tolerant computer architecture and computer arithmetic. |
| 2011 | Gurindar (Guri) S. Sohi | For pioneering widely used micro-architectural techniques for instruction-level parallelism. |
| 2010 | William J. Dally | For outstanding contributions to the architecture of interconnection networks and parallel computers. |
| 2009 | Joel S. Emer | For pioneering contributions to performance analysis and modeling methodologies; for design innovations in several significant industry microprocessors; and for deftly bridging research and development, academia and industry. |
| 2008 | David A. Patterson | For seminal contributions to RISC microprocessor architectures, RAID storage systems design, and reliable computing, and for leadership in education and in disseminating academic research results into successful industrial products. |
| 2007 | Mateo Valero | For extraordinary leadership in building a world class computer architecture research center, for seminal contributions in the areas of vector computing and multithreading, and for pioneering basic new approaches to instruction-level parallelism. |
| 2006 | James H. Pomerene | For pioneering innovations in computer architecture, including early concepts in cache, reliable memories, pipelining and branch prediction, for the design of the IAS computer and for the design of the Harvest supercomputer. |
| 2005 | Robert P. Colwell | For outstanding achievements in the design and implementation of industry-changing micro-architectures, and for significant contributions to the RISC/CISC architecture debate. |
| 2004 | Frederick P. Brooks, Jr. | For the definition of computer architecture and contributions to the concept of computer families and to the principles of instruction set design; for seminal contributions in instruction sequencing, including interrupt systems and execute instructions; and for contributions to the IBM 360 instruction set architecture. |
| 2003 | Joseph A. (Josh) Fisher | In recognition of 25 years of seminal contributions to instruction-level parallelism, pioneering work on VLIW architectures, and the formulation of the Trace Scheduling compilation technique. |
| 2002 | B. Ramakrishna (Bob) Rau | For pioneering contributions to statically-scheduled instruction-level parallel processors and their compilers. |
| 2001 | John L. Hennessy | For being the founder and chief architect of the MIPS Computer Systems and contributing to the development of the landmark MIPS R2000 microprocessor. |
| 2000 | Edward S. Davidson | For seminal contributions to the design, implementation, and performance evaluation of high performance pipelines and multiprocessor systems. |
| 1999 | James E. Smith | For fundamental contributions to high performance micro-architecture, including saturating counters for branch prediction, reorder buffers for precise exceptions, decoupled access/execute architectures, and vector supercomputer organization memory, and interconnects. |
| 1998 | Tadashi Watanabe | For contributions to the architectural design of supercomputers with multiple/parallel vector pipelines and programmable vector caches. |
| 1997 | Robert Tomasulo | For the ingenious Tomasulo's algorithm, which enabled out-of-order execution processors to be implemented. |
| 1996 | Yale N. Patt | For important contributions to instruction level parallelism and superscalar processor design. |
| 1995 | John H. Crawford | In recognition of your impact on the computer industry through your development of microprocessor technology. |
| 1994 | James E. Thornton | For his pioneering work on high performance processors; for inventing the scoreboard for instruction issue; and for fundamental contributions to vector supercomputing. |
| 1993 | David Kuck | For his impact on the field of supercomputing, including his work in shared memory multiprocessing, clustered memory hierarchies, compiler technology, and application/library tuning. |
| 1992 | Michael J. Flynn | For his important and seminal contributions to processor organization and classification, computer arithmetic and performance evaluation. |
| 1991 | Burton Smith | For pioneering work in the design and implementation of scalable shared memory multiprocessors. |
| 1990 | Kenneth Batcher | For contributions to parallel computer architecture, both for pioneering theories in interconnection networks and for the pioneering implementations of parallel computers. |
| 1989 | Seymour Cray | For a career of achievements that have advanced supercomputer design. |
| 1988 | Daniel P. Siewiorek | For outstanding contributions in parallel computer architecture, reliability, and computer architecture education. |
| 1987 | Gene M. Amdahl | For outstanding innovations in computer architecture, including pipelining, instruction look- ahead and cache memory. |
| 1986 | Harvey G. Cragon | For major contributions to computer architecture and for pioneering the application of integrated circuits for computer purposes and for serving as architect of the Texas Instruments scientific computer and for playing a leading role in many other computing developments in that company. |
| 1985 | John Cocke | For contributions to high performance computer architecture through look ahead, parallelism and pipeline utilization, and to reduced instruction set computer architecture through the exploitation of hardware-software tradeoffs and compiler optimization. |
| 1984 | Jack B. Dennis | |
| 1983 | Tom Kilburn | |
| 1982 | C. Gordon Bell | |
| 1981 | Wesley A. Clark | |
| 1980 | Maurice V. Wilkes | |
| 1979 | Robert S. Barton |
UCLA's Algirdas Avižienis Honored with Eckert-Mauchly Award
LOS ALAMITOS, Calif., 21 May, 2012 -- ACM (the Association for Computing Machinery) and the IEEE Computer Society will jointly present the Eckert-Mauchly Award to Algirdas Avižienis of the University of California, Los Angeles for fundamental contributions to fault-tolerant computer architecture and computer arithmetic. His conceptual designs led to construction of the Self-Testing and Repairing (STAR) computer at the Jet Propulsion Laboratory at California Institute of Technology, which was instrumental to the JPL mission to explore space. The Eckert-Mauchly award is known as the computer architecture community's most prestigious award. Avižienis will receive the 2012 Eckert-Mauchly Award at the International Symposium on Computer Architecture on 12 June in Portland, Oregon.
Avižienis coined the term Fault-Tolerant Computing to capture the unique aspects of his ideas for creating a low-power, long life computer using self-repairing techniques. He chaired the first IEEE Technical Committee on Fault-Tolerant Computing in 1969, and established the first international conference. Moving to UCLA from the Jet Propulsion Laboratory, he expanded the scope of his research to fault-tolerant system architecture and dependability modeling. He extended his work on error-detecting codes for VLSI (Very Large Scale Integration) design, resulting in new techniques to implement self-checking programmable logic arrays and improved chip yields.
Continuing his contributions to the science of dependable computing, Avižienis addressed ways to provide tolerance against software faults through Multi-Version Programming. He subsequently developed redundant number systems for fast digital arithmetic, a critical element in the field of digital arithmetic and created efficient algorithms for error-coded operations.
In addition to mentoring a large number of Ph.D. and M.S. students, Avižienis established one of the first graduate courses in the US dedicated to computer algorithms and processors. When Lithuania achieved independence in 1990, he helped establish western-style research and Ph.D. programs at the national university of Lithuania, Vytautas Magnus, which is located in his home town.
A Fellow of IEEE, he is a recipient of the American Institute of Aeronautics and Astronautics (AIAA) Information Systems Award and the National Aeronautics and Space Administration (NASA) Exceptional Service Award. He also received the IEEE Computer Society Technical Achievement Award and the International Federation for Information Processing (IFIP) Silver Core Award. He earned B.S., M.S. and Ph.D. degree from the University of Illinois, Urbana-Champaign.
ACM and the IEEE Computer Society co-sponsor the Eckert-Mauchly Award, which was initiated in 1979. It recognizes contributions to computer and digital systems architecture and comes with a $5,000 prize. The award was named for John Presper Eckert and John William Mauchly, who collaborated on the design and construction of the Electronic Numerical Integrator and Computer (ENIAC), the pioneering large-scale electronic computing machine, which was completed in 1947.
Guri Sohi Wins 2011 Eckert-Mauchly Award
LOS ALAMITOS, Calif., 4 May, 2011 -- The IEEE Computer Society and ACM (the Association for Computing Machinery) will jointly present the Eckert-Mauchly Award to Gurindar S. (Guri) Sohi of the University of Wisconsin-Madison for pioneering widely used micro-architectural techniques in the design of high-performance microprocessors. These innovations increase the instruction-level parallelism, a measure of how many of the operations in a computer program can be performed simultaneously. They can be found in almost every commercial microprocessor used today in personal computers and high-end servers.
The Eckert Mauchly Award is known as the computer architecture community's most prestigious award. Sohi will receive the 2011 Eckert-Mauchly Award at the International Symposium on Computer Architecture (ISCA) held as part of the Federated Computing Research Conference (FCRC) on 7 June in San Jose, CA.
Early in his career, Sohi articulated a model for a dynamically scheduled processor supporting precise exceptions. This model has served as the basis for many commercial superscalar microprocessors that have been designed and built since the early 1990s. His group also proposed the idea of memory dependence prediction to further improve instruction-level parallelism, a technology that has been considered a key innovation in some recent microprocessors. His work on memory systems for superscalar processors was instrumental in influencing high-end microprocessors to switch from blocking to non-blocking caches.
Sohi also invented the multiscalar paradigm, which pioneered the concepts of thread-level speculation that permit a single, sequential program to be executed in parallel on multiple processing cores. These concepts have also been adopted by several multicore processor designs and continue to influence thinking about how to design future microprocessors.
In addition to a variety of other contributions to processor and memory hierarchy design, Sohi has educated and trained many successful Ph.D graduates who have gone on to make their own impact in the field. He continues to supervise a small group of students investigating how to execute programs in parallel on multicore processors.
A recipient of the 1999 Maurice Wilkes Award from ACM SIGARCH (Special Interest Group on Computer Architecture), Sohi is a Fellow of ACM and the IEEE. He was elected to the National Academy of Engineering in 2009. He has been at the University of Wisconsin-Madison since 1985 where he is currently the John P. Morgridge Professor and the E. David Cronon Professor of Computer Sciences. From 2004-2008, he served as chair of the Computer Sciences Department. He received a B.E degree from the Birla Institute of Technology and Science (Pilani, India) and M.S and Ph.D. degrees in Electrical and Computer Engineering from the University of Illinois.
ACM and the IEEE Computer Society co-sponsor the Eckert-Mauchly Award, which was initiated in 1979. It recognizes contributions to computer and digital systems architecture and comes with a $5,000 prize. The award was named for John Presper Eckert and John William Mauchly, who collaborated on the design and construction of the Electronic Numerical Integrator and Computer (ENIAC), the first large-scale electronic computing machine, which was completed in 1947.
Nominations Sought for Eckert-Mauchly Award
LOS ALAMITOS, Calif., 5 November 2010 – Nominations are being sought for the Eckert-Mauchly Award, the computer architecture community's most prestigious award.
The award, co-sponsored by the IEEE Computer Society and ACM, recognizes outstanding contributions to computer and digital systems architecture. It comes with a certificate and a $5,000 honorarium.
The nomination deadline is 30 March. To make a nomination, visit http://www.computer.org/portal/web/awards/eckert or http://www.computer.org/awards. For further details, email awards@computer.org
Established in 1979, the award was named for John Presper Eckert and John William Mauchly, who collaborated on the design and construction of the Electronic Numerical Integrator and Computer (ENIAC), the first large-scale electronic computing machine, which was completed in 1947.
William J. Dally, chief scientist of Nvidia Corp. and former computer science professor at Stanford University, won the award in 2010 "for outstanding contributions to the architecture of interconnection networks and parallel computers."
Intel Fellow Joel S. Emer was recognized with the award in 2009 "for pioneering contributions to performance analysis and modeling methodologies; for design innovations in several significant industry microprocessors; and for deftly bridging research and development, academia and industry."
In 2008, the award went to David A. Patterson of University of California at Berkeley "for seminal contributions to RISC microprocessor architectures, RAID storage systems design, and reliable computing, and for leadership in education and in disseminating academic research results into successful industrial products."
The award will be presented at the 38th International Symposium on Computer Architecture (ISCA), which runs from 4-8 June, 2011, in San Jose, California.