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| ASCII Text | x | ||
| Chih-Ping Chu, Doris L. Carver, "Parallelizing Subroutines in Sequential Programs," IEEE Software, vol. 11, no. 1, pp. 77-85, January/February, 1994. | |||
| BibTex | x | ||
| @article{ 10.1109/52.251214, author = {Chih-Ping Chu and Doris L. Carver}, title = {Parallelizing Subroutines in Sequential Programs}, journal ={IEEE Software}, volume = {11}, number = {1}, issn = {0740-7459}, year = {1994}, pages = {77-85}, doi = {http://doi.ieeecomputersociety.org/10.1109/52.251214}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Software TI - Parallelizing Subroutines in Sequential Programs IS - 1 SN - 0740-7459 SP77 EP85 EPD - 77-85 A1 - Chih-Ping Chu, A1 - Doris L. Carver, PY - 1994 KW - subroutines; parallel algorithms; structured programming; parallel programming; IBM computers; subroutine parallelization; sequential programs; execution mode; code restructuring; recursive process; IBM 3090 multiprocessor; shared-memory multiprocessor system; local memory; common memory; interprocessor synchronization; interprocessor communication; special memory locations; Cray X-MP; Alliant FX/8; structured Fortran program VL - 11 JA - IEEE Software ER - | |||
An algorithm for making sequential programs parallel is described, which first identifies all subroutines, then determines the appropriate execution mode and restructures the code. It works recursively to parallelize the entire program. We use Fortran in our work, but many of the concepts apply to other languages. Our hardware model is a shared-memory multiprocessor system with a fixed number of identical processors, each with its own local memory connected to a common memory that is accessible to all processors equally. The model implements interprocessor synchronization and communication via special memory locations or special storage. Systems like the Cray X-MP, IBM 3090, and Alliant FX/8 fit this model. Our input is a sequential, structured Fortran program with no overlapping branches. With today's emphasis on writing structured code, this restriction is reasonable. A prototype of a system to implement the algorithm is under development on an IBM 3090 multiprocessor.

