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| Grant Martin, "Making a List...Checking it Twice," IEEE Design & Test of Computers, vol. 24, no. 6, pp. 596-597, November-December, 2007. | |||
| BibTex | x | ||
| @article{ 10.1109/MDT.2007.197, author = {Grant Martin}, title = {Making a List...Checking it Twice}, journal ={IEEE Design & Test of Computers}, volume = {24}, number = {6}, issn = {0740-7475}, year = {2007}, pages = {596-597}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2007.197}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - Making a List...Checking it Twice IS - 6 SN - 0740-7475 SP596 EP597 EPD - 596-597 A1 - Grant Martin, PY - 2007 KW - low power KW - methodology manual KW - IC design KW - SoC design VL - 24 JA - IEEE Design & Test of Computers ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2007.197
This is a review of Low Power Methodology Manual: For System-on-Chip Design (by Michael Keating, David Flynn, Rob Aitken, Alan Gibbons, and Kaijian Shi). This book provides a comprehensive inventory of methods of low-power IC design, along with discussions of the various options available to design groups for implementing both basic and advanced techniques into their SoC designs. It also contains some chapter references and a reasonably sized bibliography that point to some of the significant background and fundamental work underlying these recommendations.
Index Terms:
low power, methodology manual, IC design, SoC design
Citation:
Grant Martin, "Making a List...Checking it Twice," IEEE Design & Test of Computers, vol. 24, no. 6, pp. 596-597, Nov.-Dec. 2007, doi:10.1109/MDT.2007.197
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