Many modern designs have large, localized failures that can be attributed to excessive power consumption, which can be measured as IR drop. This IR drop is problematic because power rails may not be sized correctly for the load they must handle in both functional and test operation, so there might be localized hot spots, or conditions of overtesting or test escapes. This article describes a methodology that uses on-chip process-monitoring circuits to identify and localize IR-drop hot spots and power-related failures. This methodology employs a circuit that is easy to integrate on chip and use in a characterization or production environment. Furthermore, the authors have developed a production screen that helps identify mismatched power rails to device performance requirements.