CSDL - IEEE Design and Test of Computers

Design&Test
2000
Issue No. 3 - July-September

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IEEE Design & Test of Computers

July-September 2000 (vol. 17 no. 3)

ISSN: 0740-7475

Table of Contents

From the EIC

Wider Coverage (Abstract)

Yervant Zorian

pp. 6

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News

News (Abstract)

pp. 8-10

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Feature

Guest Editors' Introduction: Benchmarking for Design and Test (HTML)

pp. 12-14

pp. 15-17

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The Mutating Metric for Benchmarking Test (Abstract)

Rohit Kapur

Cy Hay

T.w. Williams

pp. 18-21

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System Specification Experiments on a Common Benchmark (Abstract)

pp. 22-32

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Inserting Scan at the Behavioral Level (Abstract)

pp. 34-42

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RT-Level ITC'99 Benchmarks and First ATPG Results (Abstract)

pp. 44-53

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First Results of ITC'99 Benchmark Circuits (Abstract)

Luis Basto

pp. 54-59

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Using a Soft Core in a SoC Design: Experiences with picoJava (Abstract)

Li Chen

pp. 60-71

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Special Feature

An Automatic Controller Extractor for HDL Descriptions at the RTL (Abstract)

Chien-Nan Jimmy Liu

Jing-Yang Jou

pp. 72-77

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A Metamodel for Studying Concepts in Electronic System Design (Abstract)

pp. 78-85

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Design Methodology for a Large Communication Chip (Abstract)

pp. 86-94

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Semicustom Design of an IEEE 1394-Compliant Reusable IC Core (Abstract)

pp. 95-105

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Digital-Compatible BIST for Analog Circuits Using Transient Response Sampling (Abstract)

Pramodchandran N. Variyam

Abhijit Chatterjee

pp. 106-115

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A Reliability Testing Environment for Off-the-Shelf Memory Subsystems (Abstract)

Seung H. Hwang

Gwan S. Choi

pp. 116-124

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A D&T Roundtable: Test Resource Partitioning (Abstract)

pp. 126-132

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Panel Summaries

Panel Summaries (Abstract)

pp. 133-135

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Standards

TTTC Reports on Recent Standards Activities (Abstract)

Mukund Modi

pp. 136-137

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DATC Newsletter

DATC Newsletter (Abstract)

pp. 139

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TTTC Newsletter

TTTC Newsletter (Abstract)

pp. 140-141

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The Last Byte

The Scientific Method and Design and Test (Abstract)

Franc Brglez

pp. 144,142-143

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